參數(shù)資料
型號: LTC3850EUF#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 860 kHz SWITCHING FREQ-MAX, PQCC28
封裝: 4 X 4 MM, PLASTIC, QFN-28
文件頁數(shù): 19/32頁
文件大小: 474K
代理商: LTC3850EUF#TR
LTC3850
26
3850f
PC Board Layout Debugging
Start with one controller at a time. It is helpful to use a
DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output
switching node (SW pin) to synchronize the oscilloscope to
the internal oscillator and probe the actual output voltage
as well. Check for proper performance over the operating
voltage and current range expected in the application.
The frequency of operation should be maintained over
the input voltage range down to dropout and until the
output load drops below the low current operation
threshold—typically 10% of the maximum designed cur-
rent level in Burst Mode operation.
The duty cycle percentage should be maintained from
cycle to cycle in a well-designed, low noise PCB imple-
mentation. Variation in the duty cycle at a subharmonic
rate can suggest noise pickup at the current or voltage
sensing inputs or inadequate loop compensation. Over-
compensation of the loop can be used to tame a poor PC
layout if regulator bandwidth optimization is not required.
Only after each controller is checked for its individual
performance should both controllers be turned on at the
same time. A particularly difcult region of operation is
when one controller channel is nearing its current com-
parator trip point when the other channel is turning on
its top MOSFET. This occurs around 50% duty cycle on
either channel due to the phasing of the internal clocks
and may cause minor duty cycle jitter.
Reduce VIN from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering VIN while
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between CIN, Schottky and the top
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
SGND pin of the IC.
Design Example
As a design example for a two channel medium current regu-
lator, assume VIN = 12V(nominal), VIN = 20V(maximum),
VOUT1 = 3.3V, VOUT2 = 1.8V, IMAX1,2 = 5A, and f = 500kHz
(see Figure 12).
The regulated output voltages are determined by:
VV
R
OUT
B
A
=+
08
1
.
Using 20k 1% resistors from both VFB nodes to ground,
the top feedback resistors are (to the nearest 1% standard
value) 63.4k and 25.5k.
The frequency is set by biasing the FREQ/PLLFLTR pin
to 1.2V (see Figure 8), using a divider from INTVCC. This
voltage will decrease as VIN approaches 5V, lowering the
switching frequency. If a separate 5V supply is connected to
EXTVCC, INTVCC will remain at 5V even if VIN decreases.
The inductance values are based on a 35% maximum
ripple current assumption (1.75A for each channel). The
highest value of ripple current occurs at the maximum
input voltage:
L
V
I
V
OUT
LMAX
OUT
IN MAX
=
f
()
1
Channel 1 will require 3.2H, and channel 2 will require
1.9H. The next highest standard values are 3.3H
and 2.2H. At the nominal input voltage (12V), the ripple
will be:
I
V
L
V
L NOM
OUT
IN NOM
()
=
f
1
Channel 1 will have 1.45A (29%) ripple, and channel 2 will
have 1.4A (28%) ripple. The peak inductor current will be
the maximum DC value plus one-half the ripple current,
or 5.725A for channel 1 and 5.7A for channel 2.
APPLICATIONS INFORMATION
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