參數(shù)資料
型號: LTC3850EUF#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 860 kHz SWITCHING FREQ-MAX, PQCC28
封裝: 4 X 4 MM, PLASTIC, QFN-28
文件頁數(shù): 11/32頁
文件大小: 474K
代理商: LTC3850EUF#TR
LTC3850
19
3850f
Undervoltage Lockout
The LTC3850 has two functions that help protect the
controller in case of undervoltage conditions. A precision
UVLO comparator constantly monitors the INTVCC voltage
to ensure that an adequate gate-drive voltage is present. It
locks out the switching action when INTVCC is below 3V.
To prevent oscillation when there is a disturbance on the
INTVCC, the UVLO comparator has 500mV of precision
hysteresis.
Another way to detect an undervoltage condition is to
monitor the VIN supply. Because the RUN pins have a
precision turn-on reference of 1.2V, one can use a resistor
divider to VIN to turn on the IC when VIN is high enough.
An extra 4.5A of current ows out of the RUN pin once
the RUN pin voltage passes 1.2V. One can program the
hysteresis of the run comparator by adjusting the values
of the resistive divider.
CIN and COUT Selection
The selection of CIN is simplied by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (VOUT)(IOUT) product needs to be used in the
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
ripple current by a factor of 30% to 70% when compared
to a single phase power supply solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (VOUT)/(VIN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
quired I
I
V
VV
V
IN
RMS
MAX
IN
OUT
IN
OUT
Re
()(
)
12
/
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even signicant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3850, ceramic capacitors
can also be used for CIN. Always consult the manufacturer
if there is any question.
The benet of the LTC3850 2-phase operation can be cal-
culated by using the equation above for the higher power
controller and then calculating the loss that would have
resulted if both controller channels switched on at the same
time. The total RMS power lost is lower when both control-
lers are operating due to the reduced overlap of current
pulses required through the input capacitor’s ESR. This is
why the input capacitor’s requirement calculated above for
the worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benet of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the efciency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common CIN(s). Separating
the sources and CIN may produce undesirable voltage and
current resonances at VIN.
A small (0.1F to 1F) bypass capacitor between the chip
VIN pin and ground, placed close to the LTC3850, is also
suggested. A 10Ω resistor placed between CIN (C1) and the
VIN pin provides further isolation between the two channels.
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satised, the capacitance is adequate for ltering. The
output ripple (ΔVOUT) is approximated by:
+
VI
ESR
fC
OUT
RIPPLE
OUT
1
8
where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since IRIPPLE increases with input voltage.
APPLICATIONS INFORMATION
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