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參數(shù)資料
| 型號： | LTC3707IGN-SYNC |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, 360 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 403K |
| 代理商： | LTC3707IGN-SYNC |
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LTC3707-SYNC
13
3707sfa
Figure 1 on the rst page is a basic IC application circuit.
External component selection is driven by the load re-
quirement, and begins with the selection of RSENSE and
the inductor value. Next, the power MOSFETs and D1 are
selected. Finally, CIN and COUT are selected. The circuit
shown in Figure 1 can be congured for operation up to an
input voltage of 28V (limited by the external MOSFETs).
RSENSE Selection For Output Current
RSENSE is chosen based on the required output current.
The current comparator has a maximum threshold of
75mV/RSENSE and an input common mode range of SGND
to 1.1(INTVCC). The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current IMAX equal to the peak value less half the
peak-to-peak ripple current,
ΔIL.
Allowing a margin for variations in the IC and external
component values yields:
R
mV
I
SENSE
MAX
=
50
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due
to the internal compensation required to meet stability
criterion for buck regulators operating at greater than 50%
duty factor. A curve is provided to estimate this reducton
in peak output current level depending upon the operating
duty factor.
Operating Frequency
The IC uses a constant frequency phase-lockable
architecture with the frequency determined by an internal
capacitor. This capacitor is charged by a xed current
plus an additional current which is proportional to the
voltage applied to the PLLFLTR pin. Refer to Phase-Locked
Loop and Frequency Synchronization in the Applications
Information section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
is increased the gate charge losses will be higher, reducing
efciency (see Efciency Considerations). The maximum
switching frequency is approximately 310kHz.
APPLICATIONS INFORMATION
Inductor Value Calculation
The operating frequency and inductor selection are
interrelated in that higher operating frequencies allow the
use of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efciency. A higher
frequency generally results in lower efciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current
ΔIL decreases with higher
inductance or frequency and increases with higher VIN:
ΔI
fL
V
L
OUT
IN
=
1
()( )
–
Accepting larger values of
ΔIL allows the use of low in-
ductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is
ΔIL=0.3(IMAX). The maximum ΔIL occurs
at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by RSENSE. Lower
inductor values (higher
ΔIL) will cause this to occur at
lower load currents, which can cause a dip in efciency in
Figure 5. PLLFLTR Pin Voltage vs Frequency
OPERATING FREQUENCY (kHz)
120
170
220
270
320
PLLFLTR
PIN
VOLTAGE
(V)
3707 F05
2.5
2.0
1.5
1.0
0.5
0
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