參數(shù)資料
型號: LTC2208IUP-14
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 14-Bit, 130Msps ADC
中文描述: 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝: 9 X 9 MM, PLASTIC, MO-220WNJR-5, QFN-64
文件頁數(shù): 7/28頁
文件大?。?/td> 1056K
代理商: LTC2208IUP-14
LTC2208-14
7
220814f
TIW
W
t
H
t
D
t
C
t
L
N – 7
N – 6
N – 5
N – 4
N – 3
ANALOG
INPUT
ENC
ENC
+
CLKOUT
CLKOUT
+
D0-D13, OF
220814 TD01
t
AP
N + 1
N + 2
N + 4
N + 3
N
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to GND, with GND and OGND
shorted (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3.3V, f
SAMPLE
= 130MHz, LVDS outputs, differential ENC
+
/
ENC
= 2V
P-P
sine wave with 1.6V common mode, input range = 2.25V
P-P
with differential drive (PGA = 0), unless otherwise specified.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a “best
fit straight line” to the transfer curve. The deviation is measured from the
center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –1/2LSB when the
output code flickers between 00 0000 0000 0000 and 11 1111 1111 1111 in
2’s complement output mode.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
Recommended operating conditions.
ELECTRICAL CHARACTERISTICS
LVDS Output Mode Timing
All Outputs are Differential and Have LVDS Levels
相關(guān)PDF資料
PDF描述
LTC2208UP-14 14-Bit, 130Msps ADC
LTC2208 16-Bit, 130Msps ADC
LTC2208CUP 16-Bit, 130Msps ADC
LTC2208IUP 16-Bit, 130Msps ADC
LTC2208UP 16-Bit, 130Msps ADC
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