參數(shù)資料
型號(hào)： LTC1553
廠商： Linear Technology Corporation
英文描述： 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor(用于奔騰II處理器的5位可編程同步開關(guān)穩(wěn)壓器)
中文描述： 5位可編程同步開關(guān)穩(wěn)壓器控制器的奔騰II處理器（用于奔騰2處理器的5位可編程同步開關(guān)穩(wěn)壓器）
文件頁(yè)數(shù)： 3/24頁(yè)
文件大?。?/td> 335K
代理商： LTC1553
3
LTC1553
SYMBOL
I
IMAX
I
SS
I
SSIL
PARAMETER
I
MAX
Sink Current
Soft Start Source Current
Maximum Soft Start Sink Current
Under Current Limit
Soft Start Sink Current Under Hard
Current Limit
Hard Current Limit Hold Time
Power Good Response Time
↑
Power Good Response Time
↓
FAULT Response Time
OT Response Time
Over-Temperature Trip Point
Over-Temperature Driver Disable
Shutdown
Driver Rise and Fall Time
Driver Nonoverlap Time
Maximum G1 Duty Cycle
VID0 to VID4 Input High Voltage
VID0 to VID4 Input Low Voltage
VID0 to VID4 Internal Pull-Up
Resistance
Digital Output Sink Current
CONDITIONS
V
IMAX
= V
CC
V
SS
= 0V, V
IMAX
= 0V, V
IFB
= V
CC
V
SENSE
= V
OUT
, V
IMAX
= V
CC
, V
IFB
= 0V
(Notes 8, 9), V
SS
= V
CC
V
SENSE
= 0V, V
IMAX
= V
CC
, V
IFB
= 0V
MIN
150
–13
30
TYP
180
–10
60
MAX
220
–7
150
UNITS
G
μ
A
μ
A
μ
A
G
G
I
SSHIL
G
20
45
mA
t
SSHIL
t
PWRGD
t
PWRBAD
t
FAULT
t
OT
V
OT
V
OTDD
V
SHDN
t
r
, t
f
t
NOL
DC
MAX
V
IH
V
IL
R
IN
V
SENSE
= 0V, V
IMAX
= 4V, V
IFB
↓
from 5V (Note 4)
V
SENSE
↑
from 0V to Rated V
OUT
V
SENSE
↓
from Rated V
OUT
to 0V
V
SENSE
↑
from Rated V
OUT
to V
CC
OUTEN
↓
, VID0 to VID4 = 0 (Note 10) (Figure 3)
OUTEN
↓
, VID0 to VID4 = 0 (Note 10) (Figure 3)
OUTEN
↓
, VID0 to VID4 = 0 (Note 10) (Figure 3)
OUTEN
↓
, VID0 to VID4 = 0 (Note 10) (Figure 3)
(Figure 4)
(Figure 4)
(Figure 4)
500
1
500
500
40
2
1.7
μ
s
ms
μ
s
μ
s
μ
s
G
0.5
200
200
15
1.9
1.6
2
G
1000
1000
60
2.12
1.8
0.8
150
G
G
G
V
V
V
G
G
G
90
100
84
ns
ns
%
V
V
k
G
30
77
2
G
88
G
G
0.8
G
10
20
I
SINK
G
10
mA
ELECTRICAL CHARACTERISTICS
V
CC
= 5V, PV
CC
= 12V, T
A
= 25
°
C, unless otherwise noted. (Note 3)
The
G
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
When I
FB
is taken below GND, it will be clamped by an internal
diode. This pin can handle input currents greater than 100mA below GND
without latchup. In the positive direction, it is not clamped to V
CC
or PV
CC
.
Note 3:
All currents into device pins are positive; all currents out of the
device pins are negative. All voltages are referenced to ground unless
otherwise specified.
Note 4:
This parameter is guaranteed by correlation and is not tested
directly.
Note 5:
The LTC1553 goes into the shutdown mode if VID0 to VID4 are
floating. Due to the internal pull-up resistors, there will be an additional
0.25mA/pin if any of the VID0 to VID4 pins are pulled low.
Note 6
: Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
the LTC1553 operating frequency, supply voltage and the external FETs
used.
Note 7:
The open-loop DC gain and transconductance from the SENSE pin to
COMP pin will be (G
ERR
)(1.265/3.3) and (g
mERR
)(1.265/3.3) respectively.
Note 8:
The current limiting amplifier can sink but cannot source current.
Under normal (not current limited) operation, the output current will be zero.
Note 9:
Under typical soft current limit, the net soft start discharge current
will be 60
μ
A (I
SSIL
) + [–10
μ
A(I
SS
)] = 50
μ
A. The soft start sink-to-source
current ratio is designed to be 6:1.
Note 10:
When VID0 to VID4 are all HIGH, the LTC1553 will be forced to
shut down internally. The OUTEN trip voltages are guaranteed by design for
all other input codes.
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