參數(shù)資料
型號(hào)： LTC1553
廠商： Linear Technology Corporation
英文描述： 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor(用于奔騰II處理器的5位可編程同步開關(guān)穩(wěn)壓器)
中文描述： 5位可編程同步開關(guān)穩(wěn)壓器控制器的奔騰II處理器（用于奔騰2處理器的5位可編程同步開關(guān)穩(wěn)壓器）
文件頁(yè)數(shù)： 17/24頁(yè)
文件大?。?/td> 335K
代理商： LTC1553
17
LTC1553
APPLICATIO
S I
FOR
ATIO
U
application might exhibit 5A input ripple current. SANYO
OS-CON part number 10SA220M (220
μ
F/10V) capacitors
feature 2.3A allowable ripple current at 85
°
C; three in
parallel at the input (to withstand the input ripple current)
will meet the above requirements. Similarly, AVX
TPSE337M006R0100 (330
μ
F/6V) have a rated maximum
ESR of 0.1
; seven in parallel will lower the net output
capacitor ESR to 0.014
. For low cost application, SANYO
MV-GX series of capacitors can be used with acceptable
performance.
W
U
U
Feedback Loop Compensation
The LTC1553 voltage feedback loop is compensated at the
COMP pin, attached to the output node of the internal g
m
error amplifier. The feedback loop can generally be com-
pensated properly with an RC + C network from COMP to
GND as shown in Figure 10a.
Loop stability is affected by the values of the inductor,
output capacitor, output capacitor ESR, error amplifier
transconductance and error amplifier compensation net-
work. The inductor and the output capacitor creates a
double pole at the frequency:
f
LC
=
1
2
π√
(L
O
)(C
OUT
)
The ESR of the output capacitor forms a zero at the
frequency:
f
ESR
=
1
2
π
(ESR)(C
OUT
)
The compensation network at the error amplifier output is
to provide enough phase margin at the 0dB crossover
frequency for the overall closed-loop transfer function.
The zero and pole from the compensation network are:
f
Z
=
1
2
π
(R
C
)(C
C
)
and
f
P
=
1
2
π
(R
C
)(C1)
respectively.
Figure 10b shows the Bode plot of the overall transfer
function.
The compensation value used in this design is based on
the following criteria: f
SW
= 12f
CO
, f
Z
= f
LC
and f
P
= 5f
CO
. At
the closed-loop frequency f
CO
, the attenuation due the LC
filter and the input resistor divider is compensated by the
gain of the PWM modulator and the gain of the error
amplifier (g
mERR
)(R
C
). Although a mathematical approach
to frequency compensation can be used, the added
Figure 10b. Bode Plot of the LTC1553 Overall Transfer Function
Figure 10a. Compensation Pin Hook-Up
–20dB/DECADE
L
f
P
f
Z
f
CO
f
ESR
FREQUENCY
1553 F10b
f
= LTC1553 SWITCHING
FREQUENCY
f
= CLOSED-LOOP CROSSOVER
FREQUENCY
f
LC
1553 F10
DAC
LTC1553
SENSE
COMP
10
R
C
C
C
C1
–
+
ERR
6
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LTC1553CG#TRPBF 功能描述:IC SW REG CNTRLR 5BIT PROG20SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件
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