參數(shù)資料
型號: LT1715CMS
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運動控制電子
英文描述: 4ns, 150MHz Dual Comparator with Independent Input/Output Supplies
中文描述: DUAL COMPARATOR, 3500 uV OFFSET-MAX, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 9/16頁
文件大?。?/td> 239K
代理商: LT1715CMS
9
LT1715
The ground pin of the LT1715 can disturb the ground plane
potential while toggling due to the extremely fast on and
off times of the output stage. Therefore, using a ground for
input termination or filtering that is separate from the
LT1715 Pin 6 ground can be highly beneficial. For ex-
ample, a ground plane tied to Pin 6 and directly adjacent
to a 1" long input trace can capacitively couple 4mV of
disturbance into the input. In this scenario, cutting the
ground plane between the GND pin and the inputs will cut
the capacitance and the disturbance down substantially.
Figure 2 shows a typical topside layout of the LT1715 on
such a multilayer board. Shown is the topside metal etch
including traces, pin escape vias, and the land pads for an
MS10 LT1715 and its adjacent X7R 10nF bypass capaci-
tors in the 0805 case.
The ground trace from Pin 6 runs under the device up to
the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1715 and
the bypass capacitors, which minimizes interference from
high frequency energy running around the ground plane or
power distribution traces.
The supply bypass should include an adjacent 10nF
ceramic capacitor and a 2.2
μ
F tantalum capacitor no
farther than 5cm away; use more capacitance on +V
S
if
driving more than 4mA loads. To prevent oscillations, it is
helpful to balance the impedance at the inverting and
noninverting inputs; source impedances should be kept
low, preferably 1k
or less.
The outputs of the LT1715 are capable of very high slew
rates. To prevent overshoot, ringing and other problems
with transmission line effects, keep the output traces
shorter than 10cm, or be sure to terminate the lines to
APPLICATIO
S I
FOR
ATIO
U
W
U
U
maintain signal integrity. The LT1715 can drive DC termi-
nations of 200
or more, but lower characteristic imped-
ance traces can be used with series termination or AC
termination topologies.
Channel Interactions
The LT1715’s two channels are designed to be entirely
independent. However, at frequencies approaching and
exceeding 100MHz, bond wire inductance begins to inter-
fere with overlapping switching edges on the two chan-
nels. Figure 3 shows one channel of the comparator
toggling at 100MHz with the other channel driven low with
the scope set to display infinite persistence. Jitter is
almost nonexistent. Figure 4 displays the same channel at
100MHz with infinite persistence, but the other channel of
the comparator is toggling as well at frequencies swept
from 60MHz to 160MHz. Jitter will occur as rising and
falling edges align for any non harmonic or non fundamen-
tal frequency of the high frequency signal.
Figure 2. Typical Topside Metal for Multilayer PCB Layouts
1715 F02
Figure 3. Clean 100MHz Toggling
Figure 4. 100MHz Jitter with Both Channels Driven
OUT A
–5V
1V/DIV
0V
5ns/DIV
1715 F03
OUT A
–5V
1V/DIV
0V
5ns/DIV
1715 F04
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LT1715CMS#PBF 功能描述:IC COMPARATOR 150MHZ DUAL 10MSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:帶電壓基準(zhǔn) 元件數(shù):4 輸出類型:開路漏極 電壓 - 電源,單路/雙路(±):2.5 V ~ 11 V,±1.25 V ~ 5.5 V 電壓 - 輸入偏移(最小值):10mV @ 5V 電流 - 輸入偏壓(最小值):- 電流 - 輸出(標(biāo)準(zhǔn)):0.015mA @ 5V 電流 - 靜態(tài)(最大值):8.5µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):- 磁滯:- 工作溫度:0°C ~ 70°C 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 安裝類型:表面貼裝 包裝:管件 產(chǎn)品目錄頁面:1386 (CN2011-ZH PDF)
LT1715CMS#PBF 制造商:Linear Technology 功能描述:High Speed Comparator IC
LT1715CMS#PBF 制造商:Linear Technology 功能描述:IC HIGH SPEED COMPARATOR
LT1715CMS#TR 功能描述:IC COMPARATOR 150MHZ DUAL 10MSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 比較器 系列:UltraFast™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS,推挽式,滿擺幅,TTL 電壓 - 電源,單路/雙路(±):2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 - 輸入偏移(最小值):5mV @ 5.5V 電流 - 輸入偏壓(最小值):1pA @ 5.5V 電流 - 輸出(標(biāo)準(zhǔn)):- 電流 - 靜態(tài)(最大值):24µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA,CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
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