12
LTC1622
APPLICATIO
S I
N
FOR
ATIO
U
down to 2.7V. Let’s assume that the MOSFET dissipation
is to be limited to P
P
= 250mW and its thermal resistance
is 50
°
C/W. Hence the junction temperature at T
A
= 25
°
C
will be 37.5
°
C and
δ
p = 0.005 (37.5 – 25) = 0.0625. The
required R
DS(ON)
is then given by:
W
U
R
P
)
DC I
p
DS ON
P
2
1
OUT
)
(
+
(
)
=
0 11
δ
The P-channel MOSFET requirement can be met by an
Si6433DQ.
The requirement for the Schottky diode is the most strin-
gent when V
OUT
= 0V, i.e., short circuit. With a 0.025
R
SENSE
resistor, the short-circuit current through the
Schottky is 0.1/0.025 = 4A. An MBRS340T3 Schottky
diode is chosen. With 4A flowing through, the diode is
rated with a forward voltage of 0.4V. Therefore, the worst-
case power dissipated by the diode is 1.6W. The addition
of D
FB
(Figure 5) will reduce the diode dissipation to
approximately 0.8W.
The input capacitor requires an RMS current rating of at
least 0.75A at temperature, and C
OUT
will require an ESR
of 0.1
for optimum efficiency.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1622. These items are illustrated graphically in the
layout diagram in Figure 6. Check the following in your
layout:
1. Is the Schottky diode closely connected between ground
at (–) lead of C
IN
and drain of the external MOSFET
2. Does the (+) plate of C
IN
connect to the sense resistor
as closely as possible This capacitor provides AC
current to the MOSFET.
3. Is the input decoupling capacitor (0.1
μ
F) connected
closely between V
IN
(Pin 8) and ground (Pin 6)
4. Connect the end of R
SENSE
as close to V
IN
(Pin 8) as
possible. The V
IN
pin is the SENSE
+
of the current
comparator.
5. Is the trace from the SENSE
–
(Pin 1) to the Sense
resistor kept short Does the trace connect close to
R
SENSE
6. Keep the switching node, SW, away from sensitive
small signal nodes.
7. Does the V
FB
pin connect directly to the feedback
resistors The resistive divider R1 and R2 must be
connected between the (+) plate of C
OUT
and signal
ground. Optional capacitor C1 should be located as
close as possible to the LTC1622.
R1 and R2 should be located as close as possible to the
LTC1622. R2 should connect to the output as close to
the load as practicable.
Figure 6. LTC1622 Layout Diagram (See PC Board Layout Checklist)
1
2
3
4
8
7
6
5
SENSE
–
I
TH
V
FB
V
IN
PDRV
GND
SYNC/
MODE
RUN/
SS
L1
R1
R2
BOLD LINES INDICATE HIGH CURRENT PATHS
R
SENSE
1622 F06
0.1
μ
F
M1
SW
C
ITH
R
ITH
C
SS
QUIET SGND
C1
LTC1622
C
IN
+
C
OUT
V
OUT
V
IN
+