
Vocabulary 
The following terms are used in this document: 
assert: When a signal asserts it transitions to a "true" state, when a signal deasserts it transitions to a "false" state. 
forward:  Host to Peripheral communication. 
reverse:  Peripheral to Host communication  
Pword:  A port word; equal in size to the width of the LPC interface.  For this implementation, PWord is always 8 bits. 
1 
A high level. 
0 
A low level. 
These terms may be considered synonymous: 
PeriphClk, nAck 
HostAck, nAutoFd 
PeriphAck, Busy 
nPeriphRequest, nFault 
nReverseRequest, nInit 
nAckReverse, PError 
Xflag, Select 
ECPMode, nSelectln 
HostClk, nStrobe 
Reference Document:  IEEE 1284 Extended Capabilities Port Protocol and ISA Interface Standard, Rev 1.14, July 14, 
1993.  This document is available from Microsoft.  
The bit map of the Extended Parallel Port  registers is: 
D7
D6
D5
D4
SMSC DS – LPC47M192 
Page 89 
Rev. 03/30/05 
DATASHEET 
D3
D2
D1
D0
Note
data 
PD7 
PD6 
PD5 
PD4 
PD3 
PD2 
PD1 
PD0 
ecpAFifo 
Addr/RLE 
Address or RLE field 
2 
dsr 
nBusy 
nAck 
PError 
Select 
nFault 
0 
0 
0 
1 
dcr 
0 
0 
Direction 
ackIntEn 
SelectIn 
nInit 
autofd 
strobe 
1 
cFifo 
Parallel Port Data FIFO 
2 
ecpDFifo 
ECP Data FIFO 
2 
tFifo 
Test FIFO 
2 
cnfgA 
0 
0 
0 
1 
0 
0 
0 
0 
cnfgB 
compress 
intrValue 
Parallel Port IRQ 
Parallel Port DMA 
ecr 
MODE 
nErrIntrEn 
dmaEn 
serviceIntr 
full 
empty 
Note 1
: These registers are available in all modes. 
Note 2
: All FIFOs use one common 16 byte FIFO. 
Note 3
: The ECP Parallel Port Config Reg B reflects the IRQ and DMA channel selected by the Configuration 
Registers. 
ECP IMPLEMENTATION STANDARD 
This specification describes the standard  interface to the Extended Capabilities Port (ECP).  All LPC devices 
supporting ECP must meet the requirements contained in this section or the port will not be supported by Microsoft. 
For a description of the ECP Protocol, please refer to the IEEE 1284 Extended Capabilities Port Protocol and ISA 
Interface Standard, Rev. 1.14, July 14, 1993. This document is available from Microsoft. 
Description 
The port is software and hardware compatible with existing parallel ports so that it may be used as a standard LPT 
port if ECP is not required. The port is designed to be simple and requires a small number of gates to implement. It 
does not do any “protocol” negotiation, rather it provides an automatic high burst-bandwidth channel that supports 
DMA for ECP in both the forward and reverse directions. 
Small FIFOs are employed in both forward and reverse directions to smooth data flow and improve the maximum 
bandwidth requirement. The size of the FIFO is 16 bytes deep.  The port supports an automatic handshake for the 
standard parallel port to improve compatibility mode transfer speed. 
The port also supports run length encoded (RLE) decompression (required) in hardware. Compression is 
accomplished by counting identical bytes and transmitting an RLE byte that indicates how many times the next byte is