參數(shù)資料
型號(hào): LPC2929FBD144
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT486-1, LQFP-144
文件頁(yè)數(shù): 4/95頁(yè)
文件大小: 1855K
代理商: LPC2929FBD144
LPC2926_27_29
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 5 — 28 September 2010
4 of 95
NXP Semiconductors
LPC2926/2927/2929
ARM9 microcontroller with CAN, LIN, and USB
4. Block diagram
Grey-shaded blocks represent peripherals and memory regions accessible by the GPDMA.
Fig 1.
LPC2926/2927/2929 block diagram
002aae143
ARM968E-S
DTCM
32 kB
ITCM
32 kB
TEST/DEBUG
INTERFACE
master
1 master
2 slaves
EXTERNAL STATIC
MEMORY CONTROLLER
GPDMA CONTROLLER
GPDMA REGISTERS
EMBEDDED FLASH
512/768 kB
16 kB
EEPROM
EMBEDDED SRAM 32 kB
SYSTEM CONTROL
TIMER0/1 MTMR
CAN0/1
GLOBAL
ACCEPTANCE
FILTER
UART/LIN0/1
PWM0/1/2/3
3.3 V ADC1/2
EVENT ROUTER
EMBEDDED SRAM 16 kB
GENERAL PURPOSE I/O
PORTS 0/1/2/3/5
TIMER 0/1/2/3
SPI0/1/2
RS485 UART0/1
WDT
AHB TO APB
BRIDGE
AHB TO DTL
BRIDGE
VECTORED
INTERRUPT
CONTROLLER
master
master
USB OTG/DEVICE
CONTROLLER
slave
slave
slave
slave
slave
slave
slave
slave
slave
slave
slave
slave
AHB TO DTL
BRIDGE
AHB TO APB
BRIDGE
5 V ADC0
QUADRATURE
ENCODER
CHIP FEATURE ID
AHB TO APB
BRIDGE
I2C0/1
AHB TO APB
BRIDGE
CLOCK
GENERATION
UNIT
POWER
MANAGEMENT
UNIT
RESET
GENERATION
UNIT
AHB
MULTI-
LAYER
MATRIX
LPC2926/2927/2929
JTAG
interface
8 kB SRAM
general subsystem
power. clock, and
reset subsystem
MSC subsystem
networking subsystem
peripheral subsystem
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