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參數(shù)資料
| 型號： | LPC2478FET208 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2478FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2478FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht |
| 文件頁數(shù)： | 36/93頁 |
| 文件大小： | 751K |
| 代理商： | LPC2478FET208 |
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LPC2478
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 12 September 2011
36 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
The Ethernet block and the CPU share a dedicated AHB subsystem that is used to access
the Ethernet SRAM for Ethernet data, control, and status information. All other AHB traffic
in the LPC2478 takes place on a different AHB subsystem, effectively separating Ethernet
activity from the rest of the system. The Ethernet DMA can also access off-chip memory
via the EMC, as well as the SRAM located on another AHB. However, using memory
other than the Ethernet SRAM, especially off-chip memory, will slow Ethernet access to
memory and increase the loading of its AHB.
The Ethernet block interfaces between an off-chip Ethernet PHY using the Media
Independent Interface (MII) or Reduced MII (RMII) protocol and the on-chip Media
Independent Interface Management (MIIM) serial bus.
7.11.1
Features
Ethernet standards support:
–
Supports 10 Mbit/s or 100 Mbit/s PHY devices including 10 Base-T, 100 Base-TX,
100 Base-FX, and 100 Base-T4.
–
Fully compliant with IEEE standard 802.3.
–
Fully compliant with 802.3x Full Duplex Flow Control and Half Duplex back
pressure.
–
Flexible transmit and receive frame options.
–
Virtual Local Area Network (VLAN) frame support.
Memory management:
–
Independent transmit and receive buffers memory mapped to shared SRAM.
–
DMA managers with scatter/gather DMA and arrays of frame descriptors.
–
Memory traffic optimized by buffering and pre-fetching.
Enhanced Ethernet features:
–
Receive filtering.
–
Multicast and broadcast frame support for both transmit and receive.
–
Optional automatic Frame Check Sequence (FCS) insertion with Circular
Redundancy Check (CRC) for transmit.
–
Selectable automatic transmit frame padding.
–
Over-length frame support for both transmit and receive allows any length frames.
–
Promiscuous receive mode.
–
Automatic collision back-off and frame retransmission.
–
Includes power management by clock switching.
–
Wake-on-LAN power management support allows system wake-up: using the
receive filters or a magic frame detection filter.
Physical interface:
–
Attachment of external PHY chip through standard MII or RMII interface.
–
PHY register access is available via the MIIM interface.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2478FET208,551 | 功能描述:ARM微控制器 - MCU LCD CONT/ETHNET USB/512K FL RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2478FET208551 | 制造商:NXP Semiconductors 功能描述:MCU ARM7 208TFBGA |
| LPC2478-STK | 功能描述:開發(fā)板和工具包 - ARM DEV BRD FOR LPC2478 64MB SDRAM 100MBIT RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| LPC2478-STK-MICTOR | 功能描述:開發(fā)板和工具包 - ARM DEV BRD FOR LPC2478 RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| LPC-24B-12R | 制造商:OPTIFUSE 功能描述: |
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