參數(shù)資料
型號(hào)： LPC2388
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0設(shè)備kB閃存/主機(jī)/ OTG公司，CAN和10位的ADC / DAC
文件頁(yè)數(shù)： 28/57頁(yè)
文件大?。?/td> 325K
代理商： LPC2388
LPC2388_0
NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 00.02 — 28 January 2008
28 of 57
NXP Semiconductors
LPC2388
Fast communication chip
Mono and stereo audio data supported.
The sampling frequency can range from 16 kHz to 48 kHz ((16, 22.05, 32, 44.1,
48) kHz).
Configurable word select period in master mode (separately for I
2
S input and output).
Two 8 word FIFO data buffers are provided, one for transmit and one for receive.
Generates interrupt requests when buffer levels cross a programmable boundary.
Two DMA requests, controlled by programmable buffer levels. These are connected
to the GPDMA block.
Controls include reset, stop and mute options separately for I
2
S input and I
2
S output.
7.21 General purpose 32-bit timers/external event counters
The LPC2388 includes four 32-bit Timer/Counters. The Timer/Counter is designed to
count cycles of the system derived clock or an externally-supplied clock. It can optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. The Timer/Counter also includes four capture inputs to trap the timer
value when an input signal transitions, optionally generating an interrupt.
7.21.1
Features
A 32-bit Timer/Counter with a programmable 32-bit prescaler.
Counter or Timer operation.
Up to four 32-bit capture channels per timer, that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
Four 32-bit match registers that allow:
–
Continuous operation with optional interrupt generation on match.
–
Stop timer on match with optional interrupt generation.
–
Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
–
Set LOW on match.
–
Set HIGH on match.
–
Toggle on match.
–
Do nothing on match.
7.22 Pulse width modulator
The PWM is based on the standard Timer block and inherits all of its features, although
only the PWM function is pinned out on the LPC2388. The Timer is designed to count
cycles of the system derived clock and optionally switch pins, generate interrupts or
perform other actions when specified timer values occur, based on seven match registers.
The PWM function is in addition to these features, and is based on match register events.
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