參數(shù)資料
型號： LPC2388
廠商： NXP Semiconductors N.V.
英文描述： Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
中文描述： 單芯片16-bit/32-bit微控制器，512的ISP /國際檢察官聯(lián)合會，以太網(wǎng)，USB 2.0設(shè)備kB閃存/主機/ OTG公司，CAN和10位的ADC / DAC
文件頁數(shù)： 22/57頁
文件大?。?/td> 325K
代理商： LPC2388
LPC2388_0
NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 00.02 — 28 January 2008
22 of 57
NXP Semiconductors
LPC2388
Fast communication chip
via the EMC, as well as the SRAM located on another AHB, if it is not being used by the
USB block. However, using memory other than the Ethernet SRAM, especially off-chip
memory, will slow Ethernet access to memory and increase the loading of its AHB.
The Ethernet block interfaces between an off-chip Ethernet PHY using the Reduced MII
(RMII) protocol and the on-chip Media Independent Interface Management (MIIM) serial
bus.
7.10.1
Features
Ethernet standards support:
–
Supports 10 Mbit/s or 100 Mbit/s PHY devices including 10 Base-T, 100 Base-TX,
100 Base-FX, and 100 Base-T4.
–
Fully compliant with IEEE standard 802.3.
–
Fully compliant with 802.3x Full Duplex Flow Control and Half Duplex back
pressure.
–
Flexible transmit and receive frame options.
–
Virtual Local Area Network (VLAN) frame support.
Memory management:
–
Independent transmit and receive buffers memory mapped to shared SRAM.
–
DMA managers with scatter/gather DMA and arrays of frame descriptors.
–
Memory traffic optimized by buffering and pre-fetching.
Enhanced Ethernet features:
–
Receive filtering.
–
Multicast and broadcast frame support for both transmit and receive.
–
Optional automatic Frame Check Sequence (FCS) insertion with Circular
Redundancy Check (CRC) for transmit.
–
Selectable automatic transmit frame padding.
–
Over-length frame support for both transmit and receive allows any length frames.
–
Promiscuous receive mode.
–
Automatic collision back-off and frame retransmission.
–
Includes power management by clock switching.
–
Wake-on-LAN power management support allows system wake-up: using the
receive filters or a magic frame detection filter.
Physical interface:
–
Attachment of external PHY chip through standard RMII interface.
–
PHY register access is available via the MIIM interface.
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LPC2388FBD144,551 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT
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