參數(shù)資料
型號(hào)： LPC2387FBD100
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： Single-chip 16-bit-32-bit MCU; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝： LPC2387FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁(yè)數(shù)： 18/64頁(yè)
文件大?。?/td> 447K
代理商： LPC2387FBD100
LPC2387
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 10 February 2011
18 of 64
NXP Semiconductors
LPC2387
Single-chip 16-bit/32-bit MCU
Single DMA and burst DMA request signals. Each peripheral connected to the
GPDMA can assert either a burst DMA request or a single DMA request. The DMA
burst size is set by programming the GPDMA.
Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and
peripheral-to-peripheral transfers.
Scatter or gather DMA is supported through the use of linked lists. This means that
the source and destination areas do not have to occupy contiguous areas of memory.
Hardware DMA channel priority. Each DMA channel has a specific hardware priority.
DMA channel 0 has the highest priority and channel 1 has the lowest priority. If
requests from two channels become active at the same time the channel with the
highest priority is serviced first.
AHB slave DMA programming interface. The GPDMA is programmed by writing to the
DMA control registers over the AHB slave interface.
One AHB master for transferring data. This interface transfers data when a DMA
request goes active.
32-bit AHB master bus width.
Incrementing or non-incrementing addressing for source and destination.
Programmable DMA burst size. The DMA burst size can be programmed to more
efficiently transfer data. Usually the burst size is set to half the size of the FIFO in the
peripheral.
Internal four-word FIFO per channel.
Supports 8-bit, 16-bit, and 32-bit wide transactions.
An interrupt to the processor can be generated on a DMA completion or when a DMA
error has occurred.
Interrupt masking. The DMA error and DMA terminal count interrupt requests can be
masked.
Raw interrupt status. The DMA error and DMA count raw interrupt status can be read
prior to masking.
7.8 Fast general purpose parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back as well as the current state of the port pins.
LPC2387 uses accelerated GPIO functions:
GPIO registers are relocated to the ARM local bus so that the fastest possible I/O
timing can be achieved.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All GPIO registers are byte and half-word addressable.
Entire port value can be written in one instruction.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LPC2387FBD100,551 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LPC2387FBD100551 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 72MHZ LQFP-100
LPC2388 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
LPC2388FBD144 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
LPC2388FBD144,551 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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