參數(shù)資料
型號(hào): LPC2387FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Single-chip 16-bit-32-bit MCU; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝: LPC2387FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 13/64頁
文件大?。?/td> 447K
代理商: LPC2387FBD100
LPC2387
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 10 February 2011
13 of 64
NXP Semiconductors
LPC2387
Single-chip 16-bit/32-bit MCU
[1]
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
[2]
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input,
digital section of the pad is disabled.
[3]
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
[4]
Open-drain 5 V tolerant digital I/O pad, compatible with I
2
C-bus 400 kHz specification. This pad requires an external pull-up to provide
output functionality. When power is switched off, this pin connected to the I
2
C-bus is floating and does not disturb the I
2
C lines.
Open-drain configuration applies to all functions on this pin.
[5]
Pad provides digital I/O and USB functions. It is designed in accordance with the
USB specification, revision 2.0
(Full-speed and
Low-speed mode only).
[6]
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis
[7]
5 V tolerant pad with 20 ns glitch filter providing digital I/O function with TTL levels and hysteresis
[8]
Pad provides special analog functionality.
[9]
When the main oscillator is not used, connect XTAL1 and XTAL2 as follows: XTAL1 can be left floating or can be grounded (grounding
is preferred to reduce susceptibility to noise). XTAL2 should be left floating.
[10] If the RTC is not used, these pins can be left floating.
[11] Pad provides special analog functionality.
[12] Pad provides special analog functionality.
[13] Pad provides special analog functionality.
[14] Pad provides special analog functionality.
[15] Pad provides special analog functionality.
7. Functional description
7.1 Architectural overview
The LPC2387 microcontroller consists of an ARM7TDMI-S CPU with emulation support,
the ARM7 local bus for closely coupled, high-speed access to the majority of on-chip
memory, the AMBA AHB interfacing to high-speed on-chip peripherals, and the AMBA
APB for connection to other on-chip peripheral functions. The microcontroller permanently
configures the ARM7TDMI-S processor for little-endian byte order.
The LPC2387 implements two AHB in order to allow the Ethernet block to operate without
interference caused by other system activity. The primary AHB, referred to as AHB1,
includes the VIC and GPDMA controller.
The second AHB, referred to as AHB2, includes only the Ethernet block and an
associated 16 kB SRAM. In addition, a bus bridge is provided that allows the secondary
AHB to be a bus master on AHB1, allowing expansion of Ethernet buffer space into
off-chip memory or unused space in memory residing on AHB1.
V
DDA
10
[15]
I
analog 3.3 V pad supply voltage:
This should be nominally the same voltage
as V
DD(3V3)
but should be isolated to minimize noise and error. This voltage is
used to power the ADC and DAC.
ADC reference:
This should be nominally the same voltage as V
DD(3V3)
but
should be isolated to minimize noise and error. Level on this pin is used as a
reference for ADC and DAC.
RTC pin power supply:
3.3 V on this pin supplies the power to the RTC
peripheral.
VREF
12
[15]
I
VBAT
19
[15]
I
Table 3.
Symbol
Pin description
…continued
Pin
Type
Description
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