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參數(shù)資料
| 型號(hào)： | LPC2367FBD100 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | ARM7 with 512 kB flash, 58 kB SRAM, Ethernet and 10-bit ADC |
| 封裝： | LPC2367FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,; |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 170K |
| 代理商： | LPC2367FBD100 |
ES_LPC2367
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Errata sheet
Rev. 6 — 20 April 2011
6 of 12
NXP Semiconductors
ES_LPC2367
Errata sheet LPC2367
Work-around:
In a system that does not use Thumb state, there will be no problem.
In a system that uses Thumb state but does not use data aborts, or does not try to use
data aborts in a recoverable manner, there will be no problem.
Otherwise the workaround is to ensure that a STR, STMIA or PUSH cannot precede a
PC-relative load. One method for this is to add a NOP before any PC-relative load
instruction. However this is would have to be done manually.
3.3 Flash.1: Operating speed out of on-chip flash is restricted
Introduction:
The operating speed of this device out of internal flash/SRAM is specified at 72 MHz.
Problem:
Code execution from internal flash is restricted depending upon the device revision:
1. Rev ‘A’ devices: Code execution from internal flash is restricted to a maximum of
60 MHz.
For example, use a PLL output frequency of F
CCO
= 360 MHz and divide it by 6
(CCLKSEL = 5) to generate 60 MHz CPU clock (Do not use even values for CCLKSEL).
Considering the example (Input crystal-12 MHz, N = 1, M = 12): F
CCO
= 288 MHz
The CPU Clock Configuration register (located at 0xE01F C104) can then be used to
divide this frequency by 6 (CCLKSEL = 5) to achieve 48 MHz. Since this register only
accepts odd values for CCLKSEL, a division by 5 (CCLKSEL = 4) is not a valid option.
In both the above revisions, code can still execute out of SRAM at up to 72 MHz.
Work-around:
None.
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PDF描述 |
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| LPC2377FBD144 | Single-chip 16-bit-32-bit microcontrollers; 512 kB flash with ISP-IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC-DAC |
| LPC2378FBD144 | Single-chip 16-bit-32-bit microcontrollers; 512 kB flash with ISP-IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC-DAC |
| LPC2387FBD100 | Single-chip 16-bit-32-bit MCU; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC |
| LPC2388FBD144 | Single-chip 16-bit-32-bit micro; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2367FBD100,551 | 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2367FBD100551 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| LPC2368 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2368FB100 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2368FBD100 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 10/100 USB CAN 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, 10/100, USB, CAN |
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