參數(shù)資料
型號(hào): LPC2367FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: ARM7 with 512 kB flash, 58 kB SRAM, Ethernet and 10-bit ADC
封裝: LPC2367FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 5/12頁
文件大?。?/td> 170K
代理商: LPC2367FBD100
ES_LPC2367
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Errata sheet
Rev. 6 — 20 April 2011
5 of 12
NXP Semiconductors
ES_LPC2367
Errata sheet LPC2367
3. Functional problems detail
3.1 Ethernet.1: Ethernet TxConsumeIndex register does not update
correctly after the first frame is sent
Introduction:
The transmit consume index register defines the descriptor that is going to be transmitted
next by the hardware transmit process. After a frame has been transmitted hardware
increments the index, wrapping the value to 0 once the value of TxDescriptorNumber has
been reached. If the TxConsumeIndex equals TxProduceIndex the descriptor array is
empty and the transmit channel will stop transmitting until software produces new
descriptors.
Problem:
The TxConsumeIndex register is not updated correctly (from 0 to 1) after the first frame is
sent. After the next frame sent, the TxConsumeIndex register is updated by two (from 0 to
2). This only happens the very first time, so subsequent updates are correct (even those
from 0 to 1, after wrapping the value to 0 once the value of TxDescriptorNumber has been
reached)
Work-around:
Software can correct this situation in many ways; for example, sending a dummy frame
after initialization.
3.2 Core.1: Incorrect update of the Abort Link register in Thumb state
Introduction:
If the processor is in Thumb state and executing the code sequence STR, STMIA or
PUSH followed by a PC relative load, and the STR, STMIA or PUSH is aborted, the PC is
saved to the abort link register.
Problem:
In this situation the PC is saved to the abort link register in word resolution, instead of
half-word resolution.
Conditions:
The processor must be in Thumb state, and the following sequence must occur:
<any instruction>
<STR, STMIA, PUSH> <---- data abort on this instruction
LDR rn, [pc,#offset]
In this case the PC is saved to the link register R14_abt in only word resolution, not
half-word resolution. The effect is that the link register holds an address that could be #2
less than it should be, so any abort handler could return to one instruction earlier than
intended.
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