參數(shù)資料
型號(hào)： LPC2364FBD100
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： ARM7 with 128 kB flash, 34 kB SRAM, Ethernet, USB 2.0 Device, CAN, and 10-bit ADC
封裝： LPC2364FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù)： 10/69頁
文件大?。?/td> 517K
代理商： LPC2364FBD100
LPC2364_65_66_67_68
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 20 October 2011
10 of 69
NXP Semiconductors
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
6.2 Pin description
Table 4.
Symbol
P0[0] to P0[31]
Pin description
Pin
Ball
Type
I/O
Description
Port 0:
Port 0 is a 32-bit I/O port with individual direction controls for each
bit. The operation of Port 0 pins depends upon the pin function selected via
the pin connect block. Pins 12, 13, 14, and 31 of this port are not available.
P0[0] —
General purpose digital input/output pin.
RD1 —
CAN1 receiver input. (LPC2364/66/68 only)
TXD3 —
Transmitter output for UART3.
SDA1 —
I
2
C1 data input/output (this is not an open-drain pin).
P0[1] —
General purpose digital input/output pin.
TD1 —
CAN1 transmitter output. (LPC2364/66/68 only)
RXD3 —
Receiver input for UART3.
SCL1 —
I
2
C1 clock input/output (this is not an open-drain pin).
P0[2] —
General purpose digital input/output pin.
TXD0 —
Transmitter output for UART0.
P0[3] —
General purpose digital input/output pin.
RXD0 —
Receiver input for UART0.
P0[4] —
General purpose digital input/output pin.
I2SRX_CLK —
Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the
I
2
S-bus specification
.
RD2 —
CAN2 receiver input. (LPC2364/66/68 only)
CAP2[0] —
Capture input for Timer 2, channel 0.
P0[5] —
General purpose digital input/output pin.
I2SRX_WS —
Receive Word Select. It is driven by the master and received
by the slave. Corresponds to the signal WS in the
I
2
S-bus specification
.
TD2 —
CAN2 transmitter output. (LPC2364/66/68 only)
CAP2[1] —
Capture input for Timer 2, channel 1.
P0[6] —
General purpose digital input/output pin.
I2SRX_SDA —
Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the
I
2
S-bus specification
.
SSEL1 —
Slave Select for SSP1.
MAT2[0] —
Match output for Timer 2, channel 0.
P0[7] —
General purpose digital input/output pin.
I2STX_CLK —
Transmit Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the
I
2
S-bus specification
.
SCK1 —
Serial Clock for SSP1.
MAT2[1] —
Match output for Timer 2, channel 1.
P0[8] —
General purpose digital input/output pin.
I2STX_WS —
Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the
I
2
S-bus
specification
.
MISO1 —
Master In Slave Out for SSP1.
MAT2[2] —
Match output for Timer 2, channel 2.
P0[0]/RD1/TXD3/
SDA1
46
[1]
K8
[1]
I/O
I
O
I/O
I/O
O
I
I/O
I/O
O
I/O
I
I/O
I/O
P0[1]/TD1/RXD3/
SCL1
47
[1]
J8
[1]
P0[2]/TXD0
98
[1]
C4
[1]
P0[3]/RXD0
99
[1]
A2
[1]
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
81
[1]
A8
[1]
I
I
I/O
I/O
P0[5]/
I2SRX_WS/
TD2/CAP2[1]
80
[1]
D7
[1]
O
I
I/O
I/O
P0[6]/
I2SRX_SDA/
SSEL1/MAT2[0]
79
[1]
B8
[1]
I/O
O
I/O
I/O
P0[7]/
I2STX_CLK/
SCK1/MAT2[1]
78
[1]
A9
[1]
I/O
O
I/O
I/O
P0[8]/
I2STX_WS/
MISO1/MAT2[2]
77
[1]
C8
[1]
I/O
O
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