參數(shù)資料
型號: LPC2361FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學處理器
英文描述: Single-chip 16-bit-32-bit MCU; up to 128 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝: LPC2361FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;LPC2362FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.htm
文件頁數(shù): 59/64頁
文件大?。?/td> 475K
代理商: LPC2361FBD100
LPC2361_62
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 25 October 2011
59 of 64
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
17. Revision history
Table 19.
Document ID
LPC2361_62 v.5
Modifications:
Revision history
Release date
20111025
Table 3
:
Updated description for USB_UP_LED.
Added
Table note 7
for TCK and TDO pins.
Added
Table note 8
for TMS, TDI, TRST, and RTCK pins.
Added
Table note 12
for RTCX1 and RTCX2 pins.
Table 4
:
Added “non-operating” to conditions column of T
stg
.
Updated storage temperature minimum/maximum to
65/+150.
Updated
Table note 5
.
Table 7
: Changed V
hys
typical value from 0.5V
DD(3V3)
to 0.05V
DD(3V3)
.
Table 12
: Updated table.
Section 14.2
: Changed section title and updated contents.
Section 14.4
: Changed section title.
Added:
Section 9 “Thermal characteristics”
.
Section 10.3 “Electrical pin characteristics”
.
Section 11.1 “Internal oscillators”
.
Section 11.2 “I/O pins”
.
Section 14.3 “RTC 32 kHz oscillator component selection”
Section 14.5 “Standard I/O pin configuration”
Section 14.6 “Reset pin configuration”
.
20100304
Product data sheet
Table 3 “Pin description”: Added table note for XTAL1 and XTAL2 pins.
Table 4 “Limiting values”: Changed V
ESD
min/max to
2500/+2500.
Table 5 “Static characteristics”: Updated min, typical and max values for oscillator pins.
Table 5 “Static characteristics”: Added table note for Z
DRV
.
Table 5 “Static characteristics”: Updated conditions and typical values for
I
DD(DCDC)dpd(3V3)
, I
BATact
, and I
BAT
.
Table 6 “Dynamic characteristics”: Added ARM processor clock frequency information.
Added Table 8 “Dynamic characteristics of flash”.
Added Table 10 “DAC electrical characteristics”.
Section 7.2 “On-chip flash programming memory”: Removed text regarding flash
endurance minimum specs.
Added Section 7.23.4.4 “Deep power-down mode”.
Section 7.24.2 “Brownout detection”: Changed V
DD(3V3)
to V
DD(DCDC)(3V3)
.
Added Section 9.1 “Power-down mode”.
Added Section 9.2 “Deep power-down mode”.
Added Section 13.2 “XTAL1 input”.
Added Section 13.3 “XTAL and RTC Printed Circuit Board (PCB) layout guidelines”.
Figure 13 “ADC characteristics”: Changed V
DDA
to V
i(VREF)
.
Data sheet status
Product data sheet
Change notice
-
Supersedes
LPC2361_62 v.4
LPC2361_62 v.4
Modifications:
-
LPC2361_62 v.3
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