參數(shù)資料
型號(hào): LPC2290FBD144
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: 16-32-bit ARM microcontroller with CAN, 10-bit ADC and external memory interface
封裝: LPC2290FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;
文件頁(yè)數(shù): 17/41頁(yè)
文件大?。?/td> 198K
代理商: LPC2290FBD144
LPC2290_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 16 November 2006
17 of 41
NXP Semiconductors
LPC2290
16/32-bit ARM microcontroller with external memory interface
6.5 Pin connect block
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals. Peripherals should be connected to the appropriate pins
prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any
enabled peripheral function that is not mapped to a related pin should be considered
undefined.
6.6 External memory controller
The external Static Memory Controller is a module which provides an interface between
the system bus and external (off-chip) memory devices. It provides support for up to four
independently configurable memory banks (16 MB each with byte lane enable control)
simultaneously. Each memory bank is capable of supporting SRAM, ROM, flash EPROM,
burst ROM memory, or some external I/O devices.
Each memory bank may be 8-bit, 16-bit, or 32-bit wide.
6.7 General purpose parallel I/O and Fast I/O
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
6.7.1
Features
Direction control of individual bits.
Separate control of output set and clear.
SPI1/SSP
Source: SPI1
SPI Interrupt Flag (SPIF), Mode Fault (MODF)
Source: SSP
(available in LPC2290/01 only)
TX FIFO at least half empty (TXRIS)
RX FIFO at least half full (RXRIS)
Receive Timeout condition (RTRIS)
Receive Overrun (RORRIS)
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
External Interrupt 3 (EINT3)
ADC
1 ORed CAN Acceptance Filter
CAN1 (TX int, RX int)
CAN2 (TX int, RX int)
11
PLL
RTC
System Control
12
13
14
15
16
17
18
19
20, 21
22, 23
A/D
CAN
Table 4.
Block
Interrupt sources
…continued
Flag(s)
VIC channel #
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