參數(shù)資料
型號(hào): LPC1224FBD48
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Cortex-M0 with up to 48 kB flash, 4 kB SRAM, RTC, comparator, 10-bit ADC, CRC, DMA and more
中文描述: Cortex-MO,最大48kB 閃存,4kB靜態(tài)隨機(jī)存儲(chǔ)器,時(shí)鐘芯片,比較器,10位ADC,CRC檢測(cè),內(nèi)存直接存取
封裝: LPC1224FBD48/101<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;LPC1224FBD48/221<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2
文件頁(yè)數(shù): 14/61頁(yè)
文件大?。?/td> 480K
代理商: LPC1224FBD48
LPC122X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 August 2011
14 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
[1]
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled.
[2]
3.3 V tolerant, digital I/O pin; default: pull-up enabled, no hysteresis.
[3]
If set to output, this normal-drive pin is in low mode by default.
[4]
I
2
C-bus pins; 5 V tolerant; open-drain; default: no pull-up/pull-down; no hysteresis.
[5]
3.3 V tolerant, digital I/O pin with RESET function; default: pull-up enabled, no hysteresis. An external pull-up resistor is required on this
pin for the Deep power-down mode.
[6]
3.3 V tolerant, digital I/O pin with analog function; default: pull-up enabled, no hysteresis.
[7]
If set to output, this normal-drive pin is in high mode by default.
[8]
3.3 V tolerant, digital I/O pin with analog function and WAKEUP function; default: pull-up enabled, no hysteresis.
[9]
3.3 V tolerant, high-drive digital I/O pin; default: pull-up enabled, no hysteresis.
[10] If the RTC is not used, RTCXIN and RTCXOUT can be left floating.
To enable a peripheral function, find the corresponding port pin, or select a port pin if the
function is multiplexed, and program the port pin’s IOCONFIG register to enable that
function. The primary SWD functions and RESET are the default functions on their pins
after reset.
Table 4.
Peripheral
Analog comparators
V
DD(IO)
V
DD(3V3)
47 63
44 56
-
-
I
I
-
-
Input/output supply voltage.
3.3 V supply voltage to the internal regulator and the ADC. Also
used as the ADC reference voltage.
Ground.
Ground.
V
SSIO
V
SS
48 64
43 55
-
-
I
I
-
-
Table 3.
Symbol
LPC122x pin description
…continued
P
P
Start
logic
input
Type Reset
state
[1]
Description
Pin multiplexing
Function
ROSC
ACMP0_I0
ACMP0_I1
ACMP0_I2
ACMP0_I3
ACMP0_O
ACMP1_I0
ACMP1_I1
ACMP1_I2
ACMP1_I3
ACMP1_O
Type
I/O
I
I
I
I
O
I
I
I
I
O
Available on ports:
PIO0_29
PIO0_19
PIO0_20
PIO0_21
PIO0_22
PIO0_27
PIO0_23
PIO0_24
PIO0_25
PIO0_26
PIO0_28
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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