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參數(shù)資料
| 型號： | LP3936SLX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | Lighting Management System for Six White LEDs and One RGB or FLASH LED |
| 中文描述： | LED DISPLAY DRIVER, QCC32 |
| 封裝： | 4.5 X 5.5 MM, 0.80 MM HEIGHT, 0.50 PITCH, CSP-32 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大小： | 520K |
| 代理商： | LP3936SLX |
MicroWire Timing Parameters
(Continued)
Symbol
Parameter
Limit
Units
Min
Max
55
10
11
12
Output Data Valid
Output Data Hold Time
CS Inactive Time
ns
ns
ns
15
10
Note:
Data guaranteed by design.
I
2
C Compatible Interface
I
2
C SIGNALS
In I
2
C mode the LP3936 pin SCL is used for the I
2
C clock and the pin CS is used for the I
2
C data signal SDA. Both these signals
need a pull-up resistor according to I
2
C specification. Unused pin DO can be left unconnected and pin DI must be connected to
V
DD_IO
or GND.
I
2
C DATA VALIDITY
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can
only be changed when CLK is LOW.
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I
2
C START AND STOP CONDITIONS
START and STOP bits classify the beginning and the end of the I
2
C session. START condition is defined as SDA signal
transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH
while SCL is HIGH. The I
2
C master always generates START and STOP bits. The I
2
C bus is considered to be busy after START
condition and free after STOP condition. During data transmission, I
2
C master can generate repeated START conditions. First
START and repeated START conditions are equivalent, function-wise.
20081412
TRANSFERRING DATA
Every byte put on the SDAline must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data
has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter
releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the 9th clock
pulse, signifying an acknowledge.Areceiver which has been addressed must generate an acknowledge after each byte has been
received.
After the START condition, the I
2
C master sends a chip address. This address is seven bits long followed by an eighth bit which
is a data direction bit (R/W). The LP3936 address is 36h. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ.
The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register.
L
www.national.com
9
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LP3936SLX/NOPB | 功能描述:LED照明驅(qū)動器 RoHS:否 制造商:STMicroelectronics 輸入電壓:11.5 V to 23 V 工作頻率: 最大電源電流:1.7 mA 輸出電流: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:SO-16N |
| LP3937ILQ-AL | 制造商:Texas Instruments 功能描述:Electronic Component |
| LP3939 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Amplifier Driver For Dual Band CDMA Handsets |
| LP3939-ES1 | 制造商:Texas Instruments 功能描述:TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC16 |
| LP3939ILQ | 制造商:Texas Instruments 功能描述:TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC16 |
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