參數(shù)資料
型號: LP3928
廠商: National Semiconductor Corporation
英文描述: High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator
中文描述: 高速雙向電平轉換器和超低壓差CMOS電壓穩(wěn)壓器
文件頁數(shù): 6/11頁
文件大?。?/td> 240K
代理商: LP3928
Electrical Characteristics
Unless otherwise specified: H = V
IH
min, L = V
IL
max, C
VBAT
= 1 μF, I
OUT
= 1 mA,
C
VCCB
= 1 μF, C
= 1 μF. Typical values and limits appearing in standard typeface apply for T
= 25C. Limits appearing in
boldface type
apply over the entire junction temperature range for operation, 40C to +125C. (Note 9) (Continued)
Level Shifter DC Current Levels
(Continued)
Unless otherwise specified: EN1 = H, EN2 = X; V
BAT
= 6V or V
CCA
= 1.95V as applicable to B or A respectively.
Symbol
Parameter
Conditions
I
BCOM
Common Static Level-Shifter
I
CCB
Current (Notes 15, 17)
I
A
Static Level-Shifter I
CCA
Current (Notes 16, 17)
I
CCBEXT
Off State I
CCB
Current with
External V
CCB
(Note 7)
I
OFFA
Off State V
CCA
Current
V
CCA
=1.9V, EN1,2=0, Ai=0V, Bi=0V,
DIRi=0V, LatchClk=0V
I
OFFBAT
Off State V
BAT
Current
EN1,2=L
I
OZA
Output Leakage Current Ai
V
CCA
=1.9V, Vi
A
=0/1.9V, EN1=L
I
OZB
Output Leakage Current Bi
Vi
B
=0V, V
BAT
=3.35V, V
CCB
=0, EN1=L
Vi
B
=2.95V, V
BAT
=3.35V, V
CCB
=2.95V,
EN1=L
I
SCA
Short Circuit Current/ Channel
Ai Output, V
CCA
=1.9V,
DIRi=L, EN2=L
I
SCB
Short Circuit Current/ Channel
Bi Output, V
BAT
=2.95V,
DIRi=H
Min
Typ
400
Max
750
Units
μA
90
165
μA
V
BAT
=3.6V, EN1=L, EN2=L
15
μA
1.5
5
μA
0.005
0.001
0.001
0.001
3
μA
μA
μA
μA
±
2
±
2
±
2
Ai=0V, Bi=H
27
17
mA
Ai=V
CCA
, Bi=L
36
56
mA
Bi=0V, Ai=H
90
58
mA
Bi=2.95V, Ai=L
60
90
mA
Level Shifter AC Electrical Characteristics
Unless otherwise specified: EN1 = H, 3.05V
V
BAT
6V, 1.65V
V
CCA
= 1.95V. ((Note 28), (Note 29))
Symbol
Parameter
t
PHL
Propagation Delay A
n
to B
n
or B
n
to A
n
t
PLH
t
R
Rise Time
t
F
Fall Time
t
MATCH
Delay Differences between Channel Outputs at
Identical Input Signals
t
SL
Latch Set Up Time
t
HL
Latch Hold Time
t
LS
Level-Shifter Mode Switch Response Time
t
DIR
Level-Shifter Direction Switch Response Time
Conditions
Min
Typ
4
4
2
2
Max
7
7
4
4
1.5
Units
ns
ns
ns
ns
ns
C
LB
= 35 pF, C
LA
= 15 pF
C
LB
= 35 pF, C
LA
= 15 pF
C
LB
= 35 pF, C
LA
= 15 pF
C
LB
= 35 pF, C
LA
= 15 pF
1
1
2
2
ns
ns
ns
ns
(Note 18)
(Note 19)
100
20
LDO Electrical Characteristics
Unless otherwise specified: EN1 = L, EN2 = H; V
OUTnom
= 2.85V, V
BAT
= V
OUT(nom)
+ 0.5V.
Symbol
Parameter
Conditions
Typical
Limit
Units
Min
2
3
0.10
Max
2
3
0.10
V
OUT
Output Voltage Tolerance
I
OUT
= 1 mA
% of
V
OUT(nom)
%/V
Line Regulation Error (Note 20)
V
BAT
= (V
OUT(nom)
+ 0.5V) to 6.0V,
I
OUT
= 1 mA
I
OUT
= 1 mA to 150 mA
V
BAT
= V
OUT(nom)
+ 1V,
I
OUT
= 100 mA,
C
OUT
= 4.7 μF (
Figure 1
)
Load Regulation Error (Note 21)
Output AC Line Regulation
0.005
%/mA
mV
PP
1.5
L
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