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參數(shù)資料
| 型號(hào)： | LP3928 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator |
| 中文描述： | 高速雙向電平轉(zhuǎn)換器和超低壓差CMOS電壓穩(wěn)壓器 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 240K |
| 代理商： | LP3928 |
Absolute Maximum Ratings
(Notes 3,
4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
BAT
, V
CCB
V
CCA
A
1
–A
3
, EN, DIR
B
1
–B
3
, LatchClk
Junction Temperature
Storage Temperature
Lead Temperature (Note 27)
Pad Temperature (Note 27)
Power Dissipation (Note 5)
θ
JA
(micro SMD), typical
0.2V to +6.5V
0.2V to +3.3V
0.2V to V
CCA
+ 0.2V
0.2V to V
CCB
+ 0.2V
150C
65C to +150C
235C
235C
180C/W
Maximum Power Dissipation
micro SMD
ESD Rating (Note 6)
Human Body Model
360 mW
2 kV
Operating Conditions
(Notes 3, 4)
V
BAT
V
CCA
V
CCB
Junction Temperature
Ambient Temperature
Maximum Power Dissipation (Note 8)
3.05V to 6.0V
1.65V to 1.95V
(Note 7)
40C to +125C
40C to +85C
220 mW
Electrical Characteristics
mA, C
VCCB
= 1 μF, C
= 1 μF. Typical values and limits appearing in standard typeface apply for T
J
= 25C. Limits ap-
pearing in
boldface type
apply over the entire junction temperature range for operation, 40C to +125C. (Note 9)
Level Shifter DC Voltage Levels
Unless otherwise specified: EN1 = H, EN2 = X; 3.05V
≤
V
BAT
≤
6V, 1.65V
≤
V
CCA
≤
1.95V.
Symbol
Parameter
Conditions
V
IHA
High Level Input Voltage
For A Pins
V
ILA
Low Level Input Voltage
V
OHA
High Level Output Voltage
For A Pins
V
OLA
Low Level Output Voltage
I
OL
=4 mA
V
IHB
High Level Input Voltage
For B Pins
V
ILB
Low Level Input Voltage
V
OHB
High Level Output Voltage
For B Pins
V
OLB
Low Level Output Voltage
I
OL
=4 mA
V
IHEN-DIR
High Level Input Voltage
For EN and DIR Pins
V
ILEN-DIR
Low Level Input Voltage
V
IHLatClk
High Level Input Voltage
For LatchClk Pin
V
ILLatClk
Low Level Input Voltage
Unless otherwise specified: H = V
IH
min, L = V
IL
max, C
VBAT
= 1 μF, I
OUT
= 1
Min
Typ
Max
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
CCA
*
0.65
0
V
CCA
0.45
0
V
CCB
*
0.7
0
V
CCB
*
0.7
0
V
CCA
*
0.75
0
V
CCB
*
0.7
0
V
CCA
+0.2
V
CCA
*
V
CCA
+0.2
V
CCA
*
0.25
V
CCB
+0.2
V
CCB
*
0.3
V
CCB
+0.2
V
CCB
*
0.2
V
CCA
+0.2
V
CCA
*
0.27
V
CCB
+0.2
V
CCA
*
0.3
I
OH
=4 mA
1.5
0.1
I
OH
=4 mA
2.75
0.1
Level Shifter DC Current Levels
Unless otherwise specified: EN1 = H, EN2 = X; V
BAT
= 6V or V
CCA
= 1.95V as applicable to B or A respectively.
Symbol
Parameter
I
IA
Input Leakage Current Ai
Vi
A
=0/1.9V, DIRi=H
(V
CCA
= 1.8V when Vi
A
= 1.9V)
I
IDIR_EN
Input Leakage Current
DIR/EN
(Note 11)
I
IB
Input Leakage Current Bi,
LatchClk (Note 12)
I
CHA
→
B
Static I
CCB
Current/Channel
Static I
CCB
Current Total
(Notes 13, 17)
I
CHB
→
A
Static I
CCB
Current/Channel
Static I
CCB
Current Total
(Notes 14, 17)
Conditions
Min
Typ
0.001
Max
±
2
Units
μA
Vi=0/1.9V (V
CCA
= 1.8V when Vi =
1.9V)
0.001
±
2
μA
Vi
B
=0/2.95V, DIRi=L
0.001
±
2
μA
EN2=H, DIRi=H,
Total Includes I
BCOM
550
2050
875
3330
μA
EN2=L, DIRi=L
Total Includes I
BCOM
2
406
30
840
μA
L
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