參數(shù)資料
型號： LMX2525LQ1321/NOPB
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： PLL合成/DDS/VCOs
英文描述： PLL FREQUENCY SYNTHESIZER, 26 MHz, QCC24
封裝： 5 X 4 MM, 0.75 MM HEIGHT, LLP-24
文件頁數(shù)： 8/17頁
文件大?。?/td> 237K
代理商： LMX2525LQ1321/NOPB
Programming Description (Continued)
R2 REGISTER
The R2 register address bits (R2 [1:0]) are “10”.
R2 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
Data Field
Address
Field
R2
(Default)
1
100100001111
0
00000001
10
R3 REGISTER
The R3 register address bits (R3 [2:0]) are “011”. This register is only written to if the SPI_DEF bit is set to 0.
R3 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
Data Field
Address
Field
R3
1
000011010000
0
0000011
01
1
R4 REGISTER
The R4 register address bits (R4 [3:0]) are “0111”. This register is only written to if the SPI_DEF bit is set to 0.
R4 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
23
22
21
20
19
18
17
16
15
14
13
12
11
10
987654321
0
Data Field
Address
Field
R4
0
000001110100
0
110010
011
1
R5 REGISTER
The R5 register address bits (R5 [4:0]) are “01111”. This register is only written to if the SPI_DEF bit is set to 0.
R5 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
23
22
21
20
19
18
17
16
15
14
13
12
11
10
98765
4321
0
Data Field
Address Field
R5
0
000000000000
0
00000
0111
1
LMX2525
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參數(shù)描述
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