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參數(shù)資料
| 型號： | LMX2525LQ1321/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 26 MHz, QCC24 |
| 封裝： | 5 X 4 MM, 0.75 MM HEIGHT, LLP-24 |
| 文件頁數(shù)： | 14/17頁 |
| 文件大小： | 237K |
| 代理商： | LMX2525LQ1321/NOPB |
Electrical Characteristics (V
IN = 2.8 V, refer to Typical Application Circuit; Limits in standard typeface are for
TA = 25 C; Limits in boldface type apply over the operating temperature range from -20 C
≤ T
A
≤ 75 C unless otherwise
noted.) (Continued)
Symbol
Parameter
Condition
Min
Typ
Max
Units
RF2 VCO FOR PDC800
Spurious Tones
@
≤ 25 kHz offset
-45
dBc
@ 25 kHz < offset
≤ 50 kHz
-60
dBc
@ 50 kHz < offset
≤ 100 kHz
-69
dBc
@ offset > 100 kHz
-75
dBc
DIGITAL INTERFACE (DATA, CLK, LE, LD, CE, BS)
V
IH
High-Level Input Voltage
0.8 V
CC
V
CC
V
0.8 V
DD
V
DD
V
IL
Low-Level Input Voltage
-0.3
0.2 V
CC
V
-0.3
0.2 V
DD
V
I
IH
High-Level Input Current
-10
10
A
I
IL
Low-Level Input Current
-10
10
A
Input Capacitance
3
pF
Rise/Fall Time
30
ns
V
OH
High-Level Output Voltage
V
CC - 0.4
V
DD - 0.4
V
OL
Low-Level Output Voltage
0.4
V
Output Capacitance
5pF
MICROWIRE INTERFACE TIMING
t
CS
Data to Clock Set Up Time
50
ns
t
CH
Data to Clock Hold Time
10
ns
t
CWH
Clock Pulse Width HIGH
50
ns
t
CWL
Clock Pulse Width LOW
50
ns
t
DS
Latch Enable LOW to Data Set Up
Time
50
ns
t
ES
Clock to Latch Enable Set Up Time
50
ns
t
EW
Latch Enable Pulse Width
50
ns
Note 5: RF PLL and VCO in PDC800 mode.
Note 6: RF PLL and VCO in PDC1500 mode.
Note 7: The reference frequency must be programmed using the OSC_FREQ control bit. For other reference frequencies, please contact National Semiconductor.
Note 8: For other frequency ranges, please contact National Semiconductor.
Note 9: Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-1 kHz
of the final frequency.
Note 10: Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-3 kHz
of the final frequency.
Note 11: Lock time specification also applies to power up with MICROWIRE serial interface.
Note 12: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA = 25 C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
LMX2525
www.national.com
6
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2525LQX1321 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Dual Frequency Synthesizer System with Integrated VCOs |
| LMX2525LQX1321/NOPB | 功能描述:IC FREQ SYNTH DUAL VCO 24-LLP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:PLLatinum™ 標準包裝:100 系列:* |
| LMX2531 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Performance Frequency Synthesizer System with Integrated VCO |
| LMX2531_07 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Performance Frequency Synthesizer System with Integrated VCO |
| LMX25311146EVAL | 功能描述:時鐘和定時器開發(fā)工具 LMX2531LQ1146 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
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