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參數(shù)資料
| 型號： | LMX2485 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 3000 MHz, PQCC24 |
| 封裝： | 4 X 4 MM, 0.8 MM, PLASTIC, LLP-24 |
| 文件頁數(shù)： | 31/37頁 |
| 文件大?。?/td> | 861K |
| 代理商： | LMX2485 |
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Programming Description
(Continued)
2.5 R4 REGISTER
This register controls the conditions for the RF PLL in Fastlock.
REGISTER
23
22 21 20 19 18 17 16 15 14 13
12
11
10
9
8
7 6 5 4
3
2
1
0
DATA[19:0]
FM
[1:0]
C3 C2 C1 C0
R4
ATPU
0
1
0
0
0
DITH
[1:0]
0
OSC_
2X
OSC_
OUT
IF_
CPP
RF_
CPP
IF_P
MUX
[3:0]
1
0
0
1
2.5.1 MUX[3:0] Frequency Out & Lock Detect MUX
These bits determine the output state of the Ftest/LD pin.
MUX[3:0]
Output Type
High Impedance
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Open Drain
Open Drain
Open Drain
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Output Description
Disabled
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
General purpose output, Logical “High” State
General purpose output, Logical “Low” State
RF & IF Digital Lock Detect
RF Digital Lock Detect
IF Digital Lock Detect
RF & IF Analog Lock Detect
RF Analog Lock Detect
IF Analog Lock Detect
RF & IF Analog Lock Detect
RF Analog Lock Detect
IF Analog Lock Detect
IF R Divider divided by 2
IF N Divider divided by 2
RF R Divider divided by 2
RF N Divider divided by 2
2.5.2 IF_P -- IF Prescaler
When this bit is set to 0, the 8/9 prescaler is used. Otherwise the 16/17 prescaler is used.
IF_P
0
1
IF Prescaler
8/9
16/17
Maximum Frequency
800 MHz
800 MHz
2.5.3 RF_CPP -- RF PLL Charge Pump Polarity
RF_CPP
0
1
RF Charge Pump Polarity
Negative
Positive (Default)
2.5.4 IF_CPP -- IF PLL Charge Pump Polarity
For a positive phase detector polarity, which is normally the case, set this bit to 1. Otherwise set this bit for a negative phase
detector polarity.
IF_CPP
0
1
IF Charge Pump Polarity
Negative
Positive
2.5.5 OSC_OUT Oscillator Output Buffer Enable
OSC_OUT
0
1
OSCout Pin
Disabled (High Impedance)
Buffered output of OSCin pin
L
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| LMX2485E | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQ | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQX | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485SQ | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485SQX | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2485_0610 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485_08 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800MHz Integer PLL |
| LMX24856211EVAL | 功能描述:時鐘和定時器開發(fā)工具 LMX2485 & LM6211 ACTIVE FILTER RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2485E | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum? Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485E EVAL | 功能描述:BOARD EVALUATION LMX2485E RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:PLLatinum™ 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
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