參數(shù)資料
型號: LMX2485
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
中文描述: PLL FREQUENCY SYNTHESIZER, 3000 MHz, PQCC24
封裝: 4 X 4 MM, 0.8 MM, PLASTIC, LLP-24
文件頁數(shù): 26/37頁
文件大?。?/td> 861K
代理商: LMX2485
Programming Description
(Continued)
2.1 R0 REGISTER
Note that this register has only one control bit, so the N counter value to be changed with a single write statement to the PLL.
REGISTER
23
22
21
20
19
18
17
16
15
14
DATA[22:0]
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C0
0
R0
RF_N[10:0]
RF_FN[11:0]
2.1.1 RF_FN[11:0] -- Fractional Numerator for RF PLL
Refer to section 2.6.1 for a more detailed description of this control word.
2.1.2 RF_N[10:0] -- RF N Counter Value
The RF N counter contains an 8/9/12/13 and a 16/17/20/21 prescaler. The N counter value can be calculated as follows:
N = RF_P·RF_C + 4·RF_B + RF_A
RF_C
Max{RF_A, RF_B} , for N-2
FM
-1 ... N+2
FM
is a necessary condition. This rule is slightly modified in the case where the
RF_B counter has an unused bit, where this extra bit is used by the delta-sigma modulator for the purposes of modulation.
Consult the tables below for valid operating ranges for each prescaler.
Operation with the 8/9/12/13 Prescaler (RF_P=0)
RF_N
RF_N [10:0]
RF_C [6:0]
RF_B [1:0]
RF_A [1:0]
<
25
25-26
27-30
31
...
1023
>
1023
N values less than 25 are prohibited.
Possible only with a second order delta-sigma engine.
Possible only with a second or third order delta-sigma engine.
0
0
1
.
.
.
1
1
1
N values above 1023 are prohibited.
0
.
1
0
.
1
0
.
1
1
.
1
0
0
0
1
.
1
1
.
1
1
.
1
Operation with the 16/17/20/21 Prescaler (RF_P=1)
RF_N
RF_N [10:0]
RF_C [6:0]
RF_B [1:0]
RF_A [1:0]
<
49
49-50
51-54
55
...
2039
2040-2043
2044-2045
>
2045
N values less than 49 are prohibited.
Possible only with a second order delta-sigma engine.
Possible with a second or third order delta-sigma engine.
0
0
0
1
.
.
.
.
1
1
1
1
Possible with a second or third order delta-sigma engine.
Possible only with a second order delta-sigma engine.
N values greater than 2045 are prohibited.
0
.
1
0
.
1
1
.
1
0
.
0
1
.
1
1
.
1
1
.
1
L
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相關PDF資料
PDF描述
LMX2485E 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQ 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQX 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485SQ 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485SQX 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
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