參數(shù)資料
型號(hào): LMX2364SLEX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: 2.6 GHz PLLatinum Fractional RF Frequency Synthesizer with 850 MHz Integer IF Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 2600 MHz, QCC24
封裝: ULTRA THIN, CSP-24
文件頁(yè)數(shù): 20/39頁(yè)
文件大?。?/td> 694K
代理商: LMX2364SLEX
Test Setup Procedures
Sensitivity
20050674
Frequency Input Pin
OSCinIF
FinIF
OSCinRF
FinRF
DC Blocking Capacitor
1 nF
100 pF
1 nF
100 pF
Corresponding Counter
IF_R/RF_R
IF_N
RF_R
RF_N
Default Counter Value
5000
5000
50
50
MUX Value
9 (IF R/2)
10 (IF N/2)
11 (RF R/2)
12 (RF N/2)
Sensitivity is defined as the power level limits beyond which
the output of the counter being tested is off by 1 Hz or more
of its expected value. It is typically measured over frequency,
voltage, and temperature. In order to test sensitivity, the
MUX[3:0] word is programmed to the appropriate value. The
counter value isthen programmed to a fixed value and a
frequency counter is set to monitor the frequency of this pin.
The expected frequency at the Ftest/LD pin should be the
signal generator frequency divided by twice the correspond-
ing counter value. The factor of two comes in because the
LMX2364 has a flip-flop which divides this frequency by two
to make the duty cycle 50% in order to make it easier to read
with the frequency counter. The frequency counter input
impedance should be set to high impedance.
In order to perform the measurement, the temperature, fre-
quency, and voltage is set to a fixed value and the power
level of the signal is varied. Note that the power level at the
part is assumed to be 4 dB less than the signal generator
power level. This accounts for 1 dB for cable losses and 3 dB
for the pad. The power level range where the frequency is
correct at the Ftest/LD pin to within 1 Hz accuracy is re-
corded for the sensitivity limits. The temperature, frequency,
and voltage can be varied in order to produce a family of
sensitivity curves. Since this is an open-loop test, the charge
pump is set to TRI-STATE and the unused side of the PLL
(RF or IF) is powered down when not being tested.
For this part, there are actually four frequency input pins,
although there is only one frequency test pin (Ftest/LD). The
conditions specific to each pin are show above.
L
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LMX2364TM 制造商:NSC 制造商全稱:National Semiconductor 功能描述:2.6 GHz PLLatinum Fractional RF Frequency Synthesizer with 850 MHz Integer IF Frequency Synthesizer
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LMX2364TMX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:2.6 GHz PLLatinum Fractional RF Frequency Synthesizer with 850 MHz Integer IF Frequency Synthesizer
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