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    參數(shù)資料
    型號: LMX2346TMX
    廠商: NATIONAL SEMICONDUCTOR CORP
    元件分類: XO, clock
    英文描述: PLLatinum⑩ Frequency Synthesizer for RF Personal Communications
    中文描述: PLL FREQUENCY SYNTHESIZER, 2000 MHz, PDSO16
    封裝: TSSOP-16
    文件頁數(shù): 6/27頁
    文件大小: 606K
    代理商: LMX2346TMX
    Electrical Characteristics
    (Continued)
    The following conditions apply; V
    CC
    = 3.0V, V
    P
    = 3.0V; 40C
    T
    A
    85C, unless specified differently.
    Symbol
    Parameter
    LOGICAL INTERFACE (CE, CLOCK, LE, DATA, LD)
    V
    IH
    High-level Input Voltage
    V
    IL
    Low-level Input Voltage
    I
    IH
    High-level Input Current
    V
    IH
    = V
    CC
    = 5.5V
    I
    IL
    Low-level Input Current
    V
    IL
    = 0V, V
    CC
    = 5.5V
    V
    OH
    High-level Output Voltage
    I
    OH
    = 500 μA
    V
    OL
    Low-level Output Voltage
    I
    OL
    = 500 μA
    MICROWIRE INTERFACE (CLOCK, LE, DATA)
    t
    CS
    Data to Clock Set Up Time
    (Note 5)
    t
    CH
    Data to Clock Hold Time
    (Note 5)
    t
    CWH
    Clock Pulse Width High
    (Note 5)
    t
    CWL
    Clock Pulse Width Low
    (Note 5)
    t
    ES
    Clock to Latch Enable Set Up
    Time
    t
    EW
    Latch Enable Pulse Width
    (Note 5)
    PHASE NOISE
    L(f)
    Single Side-Band Phase Noise
    F
    IN
    = 900 MHz
    F
    φ
    = 200 kHz
    F
    OSC
    = 10 MHz
    V
    OSC
    = 1.0 V
    PP
    T
    A
    = 25C
    F
    IN
    = 1750 MHz
    F
    φ
    = 200 kHz
    F
    OSC
    = 10 MHz
    V
    OSC
    = 1.0 V
    PP
    T
    A
    = 25C
    F
    IN
    = 1960 MHz
    F
    φ
    = 200 kHz
    F
    OSC
    = 10 MHz
    V
    OSC
    = 1.0 V
    PP
    T
    A
    = 25C
    F
    IN
    = 2450 MHz
    F
    φ
    = 200 kHz
    F
    OSC
    = 10 MHz
    V
    OSC
    = 1.0 V
    PP
    T
    A
    = 25C
    L
    N
    (f)
    Normalized Single Side-Band
    Phase Noise
    F
    OSC
    = 10 MHz
    V
    OSC
    = 1.0 V
    PP
    T
    A
    = 25C
    Conditions
    Min
    Typ
    Max
    Units
    0.8 V
    CC
    V
    V
    μA
    μA
    V
    V
    0.2 V
    CC
    1.0
    1.0
    1.0
    1.0
    V
    CC
    0.4
    0.4
    50
    10
    50
    50
    ns
    ns
    ns
    ns
    (Note 5)
    50
    ns
    50
    ns
    (Note 3)
    91
    dBc/Hz
    (Notes 3, 9)
    86
    dBc/Hz
    (Note 3)
    85
    dBc/Hz
    (Note 3)
    83
    dBc/Hz
    F
    φ
    = 200 kHz
    (Note 8)
    164.5
    dBc/Hz
    Note 1:
    Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for
    which the device is intended to be functional. For guaranteed specifications and test conditions see the Electrical Characteristics.
    Note 2:
    This device is a high performance RF integrated circuit with an ESD rating
    <
    2 kV. Handling and assembly of this device should only be done at ESD
    protected workstations.
    Note 3:
    Phase Noise is measured using a reference evaluation board with a loop bandwidth of approximately 12 kHz. The phase noise specification is the
    composite average of 3 measurements made at frequency offsets of 2.0, 2.5 and 3.0 kHz.
    Note 4:
    See Charge Pump Measurement Definitions for detail on how these measurements are made.
    Note 5:
    See Serial Input Data Timing.
    Note 6:
    See F
    IN
    Sensitivity Test Setup.
    Note 7:
    See OSC
    in
    Sensitivity Test Setup.
    Note 8:
    Normalized Single-Side Band Phase Noise is defined as: L
    N
    (f) = L(f) 20 log (F
    IN
    / F
    φ
    ), where L(f) is defined as the Single Side-Band Phase Noise.
    Note 9:
    This parameter is derived from Normalized Single Side-Phase Noise, L
    n
    (f).
    Note 10:
    For F
    OSC
    frequencies below 10 MHz, it is recommended that the rise time of the signal does not exceed 25ns.
    L
    www.national.com
    6
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