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參數(shù)資料
| 型號： | LMX2346TMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum⑩ Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2000 MHz, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁數(shù)： | 22/27頁 |
| 文件大小： | 606K |
| 代理商： | LMX2346TMX |
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1.0 Functional Description
(Continued)
1.9 POWER-DOWN
CE
0
1
1
1
1
PD[1:0]
X
0
1
2
3
Operating Mode
Power-down (Asynchronous)
Normal Operation
Power-down (Synchronous)
Counter Reset
Power-down (Asynchronous)
The LMX2346/7 are power controlled through logical control
of the CE pin in conjunction with programming of the PD
control word. A truth table is provided that describes how the
state of the CE pin and the PD control word set the operating
mode of the device. A complete programming description for
the PD control word is provided in Section 2.3.1.
When the device enters the power-down mode, the oscillator
buffer, RF prescaler, phase detector, and charge pump cir-
cuits are all disabled. The OSC
, CP
, F
, F
, LD pins
are all forced to a high impedance state. The reference
divider and feedback divider circuits are disabled and held at
the load point during power-down. When the device is pro-
grammed to normal operation, the oscillator buffer, RF pres-
caler, phase detector, and charge pump circuits are all pow-
ered on. The feedback divider and the reference divider are
2.0 Programming Description
held at the load point. This allows the RF Prescaler, feed-
back divider, reference oscillator, and the reference divider
circuitry to reach proper bias levels. After a 1.5 μs delay, the
feedback and reference divider are enabled and they re-
sume counting in “close” alignment (The maximum error is
one prescaler cycle). The MICROWIRE control register re-
mains active and capable of loading and latching in data
while in the power-down mode.
The synchronous power-down function is gated by the
charge pump. When the device is configured for synchro-
nous power-down, the device will enter the power-down
mode upon the completion of the next charge pump pulse
event.
The asynchronous power-down function is NOT gated by the
completion of a charge pump pulse event. When the device
is configured for asynchronous power-down, the part will go
into power down mode immediately.
A counter reset function is provided. When the PD control
word is programmed to Counter Reset, both the feedback
divider and the reference divider are disabled and held at
their load point. When the device is programmed to normal
operation, both the feedback divider and the reference di-
vider are enabled (without a delay) and resume counting in
“close” alignment (The maximum error is one prescaler
cycle).
2.1 MICROWIRE INTERFACE
The MICROWIRE interface is comprised of an 18-bit shift register, and two control registers. The shift register consists of a 17-bit
DATAfield and a 1-bit address (ADDR) field as shown below. When Latch Enable transitions HIGH, data stored in the shift register
is loaded into either the R or N register depending on the state of the ADDR bit. The data is loaded MSB first. The DATA field
assignments for the R and N registers are shown in Section 2.1.1.
MSB
DATA
17
LSB
ADDR
1
0
ADDR
1
0
Target Register
R register
N register
2.1.1 Register Map
Register
Most Significant Bit
17
SHIFT REGISTER BIT LOCATION
11
10
9
Data Field
CP_TRI
Least Significant Bit
2
1
16
15
14
13
12
8
7
6
5
4
3
0
ADDR
1
0
R
N
R_OPT [2:0]
LD_OUT [1:0]
PD_POL
R_CNTR [9:0]
NA_CNTR [4:0]
NB_CNTR [9:0]
PD [1:0]
2.2 R REGISTER
The R register contains the R_CNTR, CP_TRI, PD_POL, LD_OUT, R_OPT control words. The detailed descriptions and
programming information for each control word is discussed in the following sections.
Register
Most Significant Bit
17
16
SHIFT REGISTER BIT LOCATION
10
9
Data Field
CP_TRI
Least Significant Bit
3
2
1
15
14
13
12
11
8
7
6
5
4
0
ADDR
1
R
R_OPT [2:0]
LD_OUT [1:0]
PD_POL
R_CNTR [9:0]
L
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| LMX2346TMX/NOPB | 功能描述:IC FREQ SYNTH 2.0GHZ RF 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| LMX2347 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Frequency Synthesizer for RF Personal Communications |
| LMX2347_ECB3006C WAF | 制造商:Texas Instruments 功能描述: |
| LMX2347SLBX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Frequency Synthesizer for RF Personal Communications |
| LMX2347SLBX/NOPB | 功能描述:IC FREQ SYNTH 2.5GHZ 16LAMCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
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