- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9165 > LMK04033BISQE/NOPB (National Semiconductor)IC CLOCK CONDITIONER PREC 48LLP PDF資料下載
參數(shù)資料
| 型號(hào)： | LMK04033BISQE/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 47/65頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CONDITIONER PREC 48LLP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PowerWise® |
| 類型： | 時(shí)鐘調(diào)節(jié)器 |
| PLL： | 是 |
| 輸入： | LVCMOS |
| 輸出： | LVCMOS，LVDS，2VPECL，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:6 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.16GHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-LLP（7x7） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1275 (CN2011-ZH PDF) |
| 其它名稱： | LMK04033BISQEDKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁當(dāng)前第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁
= 0.00164,
MHz
V
(2.03 - 0.814) 10
6
12.288 81.4 - (-81.4)
(
)
'V 10
6
FNOM ('ppm2 - 'ppm1)
KVCO =
= 0.00164
MHz
V
2.03 - 0.814
0.001 - (-0.001)
KVCO =
'F
'V
,
MHz
V
=
¨
§ 'F
2 - 'F1
VTUNE2 - VTUNE1
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
The tuning curve achieved in the user's application may differ from the curve shown above due to differences in
PCB layout and component selection.
This data is measured on the bench with the crystal integrated with the LMK04000 family. Using a voltmeter to
monitor the VTUNE node for the crystal, the PLL1 reference clock input frequency is swept in frequency and the
resulting tuning voltage generated by PLL1 is measured at each frequency. At each value of the reference clock
frequency, the lock state of PLL1 should be monitored to ensure that the tuning voltage applied to the crystal is
valid.
The curve shows over the tuning voltage range of 0.17 VDC to 3.0 VDC, the frequency range is ± 163 ppm; or
equivalently, a crystal frequency range of ± 2000 Hz. The measured tuning voltage at the nominal crystal
frequency (12.288 MHz) is 1.4 V. Using the diode data sheet tuning characteristics, this voltage results in a
tuning capacitance of approximately 6.5 pF.
The tuning curve data can be used to calculate the gain of the oscillator (KVCO). The data used in the calculations
is taken from the most linear portion of the curve, a region centered on the crossover point at the nominal
frequency (12.288 MHz). For a well designed circuit, this is the most likely operating range. In this case, the
tuning range used for the calculations is ± 1000 Hz (± 0.001 MHz), or ± 81.4 ppm. The simplest method is to
calculate the ratio:
ΔF2 and ΔF1 are in units of MHz. Using data from the curve this becomes:
A second method uses the tuning data in units of ppm:
FNOM is the nominal frequency of the crystal and is in units of MHz. Using the data, this becomes:
In order to ensure startup of the oscillator circuit, the equivalent series resistance (ESR) of the selected crystal
should conform to the specifications listed in the table of Electrical Characteristics. It is also important to select a
crystal with adequate power dissipation capability, or drive level. If the drive level supplied by the oscillator
exceeds the maximum specified by the crystal manufacturer, the crystal will undergo excessive aging and
possibly become damaged. Drive level is directly proportional to resonant frequency, capacitive load seen by the
crystal, voltage and equivalent series resistance (ESR). For more complete coverage of crystal oscillator design,
see
Application
Note
AN-1939
at
or
Termination and use of Clock Output (Drivers)
When terminating clock drivers keep in mind these guidelines for optimum phase noise and jitter performance:
Transmission line theory should be followed for good impedance matching to prevent reflections.
Clock drivers should be presented with the proper loads. For example:
–
LVDS drivers are current drivers and require a closed current loop.
–
LVPECL drivers are open emitters and require a DC path to ground.
Receivers should be presented with a signal biased to their specified DC bias level (common mode voltage)
for proper operation. Some receivers have self-biasing inputs that automatically bias to the proper voltage
level. In this case, the signal should normally be AC coupled.
Copyright 2008–2011, Texas Instruments Incorporated
51
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27468E21A2P | CONN RCPT 65POS JAM NUT W/PINS |
| VI-BWL-MY-F4 | CONVERTER MOD DC/DC 28V 50W |
| VI-BWL-MY-F3 | CONVERTER MOD DC/DC 28V 50W |
| AD5204BR100 | IC DGTL POT QUAD 256POS 24-SOIC |
| AD5204BN50 | IC DGTL POT QUAD 256POS 24-DIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMK04033BISQX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
| LMK04033BISQX/NOPB | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| LMK04100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs |
| LMK04100EVAL/NOPB | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 LMK04100 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMK04100SQ/NOPB | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。