參數(shù)資料
型號: LM2702
廠商: National Semiconductor Corporation
英文描述: TFT Panel Module
中文描述: 液晶面板模塊
文件頁數(shù): 7/21頁
文件大?。?/td> 813K
代理商: LM2702
Electrical Characteristics
(Continued)
Specifications in standard type face are for T
= 25C and those with
boldface type
apply over the full
Operating Tempera-
ture Range
( T
J
= 40C to +125C). Unless otherwise specified, V
IN
=2.2V and AV
IN
= 8V, R
COM
= R
GAMMA
= 50
, C
COM
=
C
GAMMA
= 1nF.
Gamma Buffer
Symbol
Parameter
Conditions
Min
(Note 5)
4
Typ
(Note 6)
Max
(Note 5)
12
Units
AV
IN
Is+
Supply Voltage
Supply Current (Amplifier +
Buffer)
Output Short Circuit Current
V
Vo = AV
IN
/2, No Load
2.2
4
mA
I
SC
Source
Sink
50
40
66
56
75
65
mA
Electrical Characteristics
Specifications in standard type face are for T
= 25C and those with
boldface type
apply over the full
Operating Tempera-
ture Range
( T
J
= 40C to +125C). Unless otherwise specified, V
IN
=2.2V and AV
IN
= 8V, R
COM
= R
GAMMA
= 50
, C
COM
=
C
GAMMA
= 1nF.
PMOS Switch Logic Control
Symbol
Parameter
Conditions
Min
(Note 5)
5.1
Typ
(Note 6)
5.7
7.3
20
Max
(Note 5)
6.1
20
Units
I
DELAY
R
DSON
I
SWO
I
SWI
Delay Current
PMOS Switch ON Resistance
PMOS Switch Current
PMOS Switch Input Current
μA
mA
Switch ON
SWC = 0V, SWO Open, SWI
= 30V
SWC = 1.7V, SWO Open,
SWI = 30V
32
μA
118
V
SWC
Switch ON
Switch OFF
1.5
1.1
1.1
V
0.7
Note 1:
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
(MAX), the junction-to-ambient thermal resistance,
θ
JA
,
and the ambient temperature, T
A
. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation
at any ambient temperature is calculated using: P
D
(MAX) = (T
J(MAX)
T
A
)/
θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Note 2:
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 3:
The human body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 4:
Vcom pin is rated for 1.5kV Human Body Model and 150V Machine Model.
Note 5:
All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100%
production tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality
Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 6:
Typical numbers are at 25C and represent the most likely norm.
Note 7:
Duty cycle affects current limit due to ramp generator. Current limit is at 0% duty cycle and will decrease with higher duty cycles. See
Typical Performance
Characteristics
for a graph of Power Switch Current Limit vs. V
IN
and Power Switch Current Limit vs. Temp.
Note 8:
See the graph titled "R
DSON
vs. V
IN
" for a more accurate value of the power switch R
DSON
.
Note 9:
Bias current flows into FB pin.
Note 10:
Refer to the graphs titled "Input Offset Voltage vs. Common Mode Voltage".
L
www.national.com
7
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