參數(shù)資料
型號(hào): LM2702
廠(chǎng)商: National Semiconductor Corporation
英文描述: TFT Panel Module
中文描述: 液晶面板模塊
文件頁(yè)數(shù): 19/21頁(yè)
文件大?。?/td> 813K
代理商: LM2702
Operation
(Continued)
Vcom AND Gamma COMPENSATION
The architecture used for the amplifiers in the LM2702 re-
quires external compensation on the output. Depending on
the equivalent capacitive load of the TFT-LCD panel, exter-
nal components at the amplifier outputs may or may not be
necessary. If the capacitance presented by the load is equal
to or greater than 5nF no external components are needed
as the TFT-LCD panel will act as compensation itself. Dis-
tributed resistive and capacitive loads enhance stability and
increase performance of the amplifiers. If the capacitance
presented by the load is less than 5nF external components
will be required as the load itself will not ensure stability. No
external compensation in this case will lead to oscillation of
the amplifier and an increase in power consumption.Asingle
5nF or greater capacitor on the output will ensure a stable
amplifier with no oscillations. For applications requiring a
higher slew rate, a good choice for compensation is to add a
50
(R
COM
or R
GAMMA
) in series with a 1nF (C
COM
or
C
This allows for driving zero to infinite capacitance loads with
no oscillations, minimal overshoot, and a higher slew rate
than using a large capacitor. The high phase margin created
by the external compensation will guarantee stability and
good performance for all conditions.
For noise sensitive applications greater output capacitance
may be desired. When the power supply for the amplifiers
(AV
IN
) is connected to the output of the switching regulator,
the output ripple of the regulator will produce ripple at the
output of the amplifiers.
LAYOUT CONSIDERATIONS
The LM2702 uses a single ground connection, GND. The
feedback, softstart, delay, and compensation networks
should be connected directly to a dedicated analog ground
plane and this ground plane must connect to the GND pin, as
shown in
Figure 3
. If no analog ground plane is available
then the ground connections of the feedback, softstart, de-
lay, and compensation networks must tie directly to the GND
pin, as show in
Figure 4
. Connecting these networks to the
PGND plane can inject noise into the system and effect
performance.
The input bypass capacitor C
IN
must be placed close to the
IC. This will reduce copper trace resistance which effects
input voltage ripple of the IC. For additional input voltage
filtering, a 100nF bypass capacitor can be placed in parallel
with C
, close to the V
pin, to shunt any high frequency
noise to ground. The output capacitor, C
, should also be
placed close to the IC. Any copper trace connections for the
C
capacitor can increase the series resistance, which
directly effects output voltage ripple and efficiency. The feed-
back network, resistors R1 and R2, should be kept close to
the FB pin, and away from the inductor, to minimize copper
trace connections that can inject noise into the system.
Trace connections made to the inductor and schottky diode
should be minimized to reduce power dissipation and in-
crease overall efficiency.
20051152
FIGURE 3. Multi-Layer Layout
L
www.national.com
19
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