參數(shù)資料
型號: LM1247
廠商: National Semiconductor Corporation
英文描述: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
中文描述: 150 MHz的I2C兼容的RGB前置放大器512個字符OSD光盤,512個字符RAM和4 DAC的內(nèi)置
文件頁數(shù): 23/48頁
文件大?。?/td> 3141K
代理商: LM1247
LM1247 Address Map
(Continued)
TABLE 5. Character ROM Read Data
Register
Fonts - 2 Color
Address
0x0000–0x2FFE
+1
0x3000–0x3FFE
+1
0x4000–0x6FFE
+1
0x7000–0x7FFE
+1
D7
D6
D5
D4
PIXEL[7:0]
X
PIXEL[7:0]
X
PIXEL[7:0]
X
PIXEL[7:0]
X
D3
D2
D1
D0
X
X
X
PIXEL[11:8]
Fonts - 4 Color
X
X
X
PIXEL[11:8]
Fonts - 2 Color
X
X
X
PIXEL[11:8]
Fonts - 4 Color
X
X
X
PIXEL[11:8]
DISPLAY PAGE RAM
This address range (0x8000–0x81FF) contains the 512 characters which comprise the displayable OSD screens. There must be
at least one End-of-Screen code (0x00) in this range to prevent unpredictable behaviour.
NOTE:
To avoid any unpredictable
behaviour, this range should be cleared by writing a 0 to bit 3 of the FRMCTRL1 Register, 0x8400, immediately after power up.
There may also be one or more pairs of End-of-Line and Skip Line codes. The codes and characters are written as 8 bit bytes
but are stored with their attributes in groups of 12 bits. When writing, one byte describes a displayed character (CC), Attribute
Code (AC), End-of-Screen (EOS), End-of-Line (EOL) or Skip Line (SL) code. The type of code is determined by the write
sequence, which must conform to the allowable sequences shown in
Table 6
. To simplify the table, CC represents one or more
character codes in sequence. A single write operation is enclosed in brackets [], and the both bytes of the Page Ram Address are
shown as one symbol, ADDR.
TABLE 6. Page RAM Write Sequences
OSD Image Consists of
Write Sequence(s)
One Line of Characters Only.
One Line of Characters with Attribute Change.
Two Lines of Characters with one Attribute.
Two Lines of Characters Separated with Skip Line.
Two Lines of Characters, each with its own Attribute.
Changing a Character String in a Displayed Screen.
Changing Only an Attribute in a Displayed Screen.
[ADDR-AC-SL-CC-EOS]
[ADDR-AC-SL-CC] [ADDR-AC-CC-EOS]
[ADDR-AC-SL-CC-EOL-SL-CC-EOS]
[ADDR-AC-SL-CC-EOL-AC-SL-EOL-AC-SL-CC-EOS]
[ADDR-AC-SL-CC-EOL] [ADDR-AC-SL-CC-EOS]
[ADDR-AC-CC]
[ADDR-CC] (CC is the currently displayed character)
When reading characters from RAM, bit 1 of the Character Font Access Register (0x8402) determines whether the character
code or its attribute code is returned.
Table 7
gives the character code format read when bit 1 of the Character Font Access
Register is a 0.
Table 8
gives the attribute format read when this bit is set to a 1.
TABLE 7. Page RAM Character Read Data
Address Range
0x8000–0x81FF
D7
D6
D5
D4
D3
D2
D1
D0
CHAR_CODE[7:0]
TABLE 8. Page RAM Attribute Read Data
Address
0x8000–0x81FF
D7
x
D6
x
D5
x
D4
x
D3
D2
D1
D0
ATTR_CODE[3:0]
RAM DATA FORMAT
Each of the 512 locations in the page RAM is comprised of a 12-bit code consisting of an 8-bit character or control code, and a
4-bit attribute code. Each of the characters are stored in sequence in the page RAM in bits 7:0. Special codes are used between
lines to show where one line ends and the next begins, and also to allow blank (or “skipped”) single scan lines to be added
between character lines.
Table 9
shows the format of a character stored in RAM. Note that even though this is a 12 bit format,
reading and writing characters and codes is done in 8 bytes.
L
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