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參數(shù)資料
| 型號： | LM1229YA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | I2C Compatible CMOS TV RGB and Deflection Processor |
| 中文描述： | WAVEFORM GENERATION, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 6/27頁 |
| 文件大?。?/td> | 969K |
| 代理商： | LM1229YA |
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Deflection Signal Characteristics
(Continued)
Unless otherwise noted: T
= 25C, V
CC
= +5.0V, V
IN
= 0.7V, V
ABL
= V
CC
, C
L
= 10 pF, See (Note 7) for Min and Max param-
eters and (Note 6) for Typicals.
Symbol
Parameter
Conditions
Min
Typ
Max
10
Units
mA
I
HDO
V
HDOH
HDRIVE Max sink current
HDRIVE Max high level output
voltage
HDRIVE Duty cycle
Delay to 50% duty cycle
Jitter (Note 19)
5
V
δ
t
ON
t
JITTER
During normal use
50
60
%
lines
Measured at 31 kHz scan
frequency
1.8
ns
f
VMIN
f
VMAX
f
VFR
V
MAXRAMPOUT
V
VMINRAMPOUT
V
RAMPDCOUT
V
RAMP
/
V
EHT1
Minimum vertical lock frequency
Maximum vertical lock frequency
Vertical free run frequency
Maximum ramp amplitude
Minimum ramp amplitude
Vertical ramp DC reference voltage
Ramp amplitude reduction with
V
EHT1
Pin 8 input resistance
Change in EW output level with
V
EHT2
Pin 9 input resistance
S correction range
C correction range
Dynamic Focus Amplitude
Maximum E-W amplitude
peak-peak
E-W output current
EW output DC at middle of
parabola
EW output DC at middle of
parabola
Trapezoid correction parabola tilt
50
Hz
Hz
Hz
V
V
V
120
30
2.2
1.4
2.5
VSIZE[7:0] = 0xFF
VSIZE[7:0] = 0x00
1.7
1.9
VEHT[3:0] varied from 0x0 to 0xF
0
4.4
%/V
R
IN-VEHT1
V
EW
/
V
EHT2
1
M
VEHT[7:4] varied from 0x0 to 0xF
0
348
mV/V
R
IN-VEHT2
k
S
k
C
V
DF
V
EW
50
k
%
%
V
0
10
11
11
DYN_FOCUS[6:0] = 0x7F
PIN[6:0] = 0x7F
1.1
1.2
V
I
EW
V
EWDCMIN
3
3
mA
HSIZE[6:0] = 0x00
1.4
V
V
EWDCMAX
HSIZE[6:0] = 0x7F
2.5
V
V
EWTRAP
Beginning and end of parabola shift
oppositely and equally. PIN[6:0] =
0x00, T_CORNER[6:0],
B_CORNER[6:0] = 0x3F.
±
0.375
V
V
EWCORNER
Corner correction shift at end points Top & bottom adjusted
independently. PIN [6:0] = 0x00,
TRAP[6:0] = 0x3F.
TRAP[6:0], T_CORNER[6:0],
B_CORNER[6:0] = 0x3F.
±
0.375
V
V
EWPIN
Pin correction amplitude
0
1.8
V
System Interface Signal Characteristics
Unless otherwise noted: T
= 25C, V
= +5.0V, V
= 0.7V, V
ABL
= V
CC
, C
L
= 10 pF, Video Outputs = 2.4 V
P-P
. See (Note 7)
for Min and Max parameters and (Note 6) for Typicals.
Symbol
Parameter
Conditions
Min
Typ
4.0
1.2
Max
Units
V
V
V
SPOT
V
REF
V
IL
Spot Killer Voltage
V
REF
output voltage (pin 2)
Logic low input voltage
(SCL, SDA, HSYNC, VSYNC)
Logic high input voltage
(SCL, SDA, HSYNC, VSYNC)
(Note 16), V
CC
Adjusted to Activate
0.5
1.5
V
V
IH
3.0
V
CC
+
0.5
V
L
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