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參數(shù)資料
| 型號： | LM1229YA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | I2C Compatible CMOS TV RGB and Deflection Processor |
| 中文描述： | WAVEFORM GENERATION, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 24/27頁 |
| 文件大小： | 969K |
| 代理商： | LM1229YA |
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Application Register Detail
(Continued)
Bits 7–0: Sets the DC level of the vertical ramp that is used to move the picture up and down. In a typical application, a setting
of 0xFF will move the raster image to the lowest position and 0x00 moves it to the highest position.
HORIZONTAL SIZE
Register
HSIZE
Addr
0x4A
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
HSIZE[6:0]
Bits 6–0: Sets the DC level of the 2nd order waveform (parabola) sent to EW to control horizontal size. In a typical application
a setting of 0x7F produces minimum width and 0x00 produces maximum width.
PINCUSHION
Register
PIN
Addr
0x4B
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
PIN[6:0]
Bit 2
Bit 1
Bit 0
Bits 6–0: Sets the amplitude of the 2nd order waveform sent to EW for pincushion. A value of 0x00 gives no parabola and a value
of 0x7F gives the maximum amount of correction.
TOP CORNER CORRECTION
Register
T_CORNER
Addr
0x4C
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T_CORNER[6:0]
Bits 5–0: Sets the amplitude of the 4th order waveform sent to EW for top corner correction. A value of 0x3F gives no correction.
A value of 0x00 gives maximum top width and 0x7F gives minimum top width.
BOTTOM CORNER CORRECTION
Register
B_CORNER
Addr
0x4D
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
B_CORNER[6:0]
Bits 5–0: Sets the amplitude of the 4th order waveform sent to EW for bottom corner correction. A value of 0x3F gives no
correction. A value of 0x00 gives maximum bottom width and 0x7F gives minimum bottom width.
TRAPEZOIDAL CORRECTION
Register
TRAP
Addr
0x4E
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TRAP[6:0]
Bits 5–0: Sets the amount of trapezoid correction. A value of 0x3F gives no correction. A value of 0x00 gives a picture with a
narrow top and 0x7F gives a picture with a wide top.
DYNAMIC FOCUS CORRECTION
Register
DYN_FOCUS
Addr
0x4F
Bit 7
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DYN_FOCUS[6:0]
Bits 5–0: Sets the amplitude of the dynamic focus. A value of 0x00 gives no correction and a value of 0x7F gives the maximum
correction.
SYNC POLARITY
Register
SYNCPOL
Addr
0x50
Bit 7
X
Bit 6
X
Bit 5
VPD
Bit 4
V2D
Bit 3
V1D
Bit 2
SERV
Bit 1
VPOL
Bit 0
HPOL
Bits 5: When set to a 1, this bit disables the vertical protect function (the power up default). This allows the LM1229 vertical
section to operate without a vertical flyback input and still keep the RGB outputs operating normally, without blanking
them. This bit must be set to a 0 to enable the vertical protect function.
Bit 4:
When this bit is a 0, the VEHT2 compensation is functional. When this bit is a 1, the VEHT2 compensation is disabled.
Bit 3:
When this bit is a 0, the VEHT1 compensation is functional. When this bit is a 1, the VEHT1 compensation is disabled.
Bit 2:
When this bit is set to a 0, the vertical output ramp is active. When set to a 1, the ramp is turned off (set to the vertical
DC reference) to produce the service line used for color temperature setup.
Bit 1:
When this bit is set to a 0, the LM1229 expects negative going vertical sync input. When this bit is a 1, it expects positive
going sync.
Bit 0:
When this bit is set to a 0, the LM1229 expects negative going horizontal sync input. When this bit is a 1, it expects
positive going sync.
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