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參數(shù)資料
| 型號(hào)： | LH5116S |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 16K (2K x 8) Static RAM |
| 中文描述： | 的CMOS 16K的（2K × 8）靜態(tài)RAM |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 58K |
| 代理商： | LH5116S |
(2) WRITE CYCLE (V
CC
= 3 V
±
10%, T
A
= 0 to +50
°
C)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
NOTE
Write cycle time
Chip enable to end of write
Address valid time
Address setup time
Write pulse width
Write recovery time
WE Low to output in High-Z
Data valid to end of write
Data hold time
Output active from end of write
Output enable to output in High-Z
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
OHZ
1000
100
100
0
100
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
1
50
20
10
0
1
1
40
NOTE:
1.
Active output to high-impedance and high-impedance to output
active tests specified for a
±
200 mV transition
from steady state levels into the test load.
AC TEST CONDITIONS
PARAMETER
MODE
NOTE
Input voltage amplitude
Input rise/fall time
Timing reference level
Output load conditions
0 to V
CC
10 ns
1.5 V
C
L
(100 pF)
1
NOTE:
1.
Includes scope and jig capacitance.
DATA RETENTION CHARACTERISTICS (T
A
= 0 to +50
°
C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
Data retention voltage
V
CCDR
CE
≥
V
CCDR
- 0.2 V
CE
≥
V
CCDR
- 0.2 V,
V
CCDR
= 2.0 V
2.0
V
Data retention current
I
CCDR
1.0
0.2
μ
A
1
Chip disable to data retention
Recovery time
t
CDR
t
R
0
ns
ns
t
RC
2
NOTES:
1.
T
A
= 25
°
C
2.
t
RC
= Read cycle time
CAPACITANCE
1
(T
A
= 25
°
C, f = 1MHz)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input capacitance
Input/output capacitance
C
IN
C
I/O
V
IN
= 0 V
VI/O = 0 V
7
10
pF
pF
NOTE:
1.
This parameter is sampled and not production tested.
LH5116S
CMOS 16K (2K
×
8) Static RAM
4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH5116SN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5117-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5117D-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5117H-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH5117HD-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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