參數(shù)資料
型號: LC89058W-E
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, SQFP-48
文件頁數(shù): 29/46頁
文件大小: 284K
代理商: LC89058W-E
LC89058W-E
No.A1056-35/64
10.4.6 Processing during error recovery
When preambles B, M, and W are detected, PLL becomes locked and data demodulation begins.
Demodulation data is output from the RLRCK edge after RERR turns to "L".
Figure 10.13 Data Processing When Data Demodulation Starts
10.5 Data Delimiter Bit 1 Output (
________
AUDIO )
____________
AUDIO outputs the channel status data delimiter bit 1 information.
Outputs bit 1 of the channel status that indicates whether the input bi-phase data is PCM audio data.
____________
AUDIO is immediately output upon detection of RERR even during "H" output period.
OR-output with IEC61937 or with the DTS-CD/LD detection flag is also possible with AOSEL.
Table 10.7
____________
AUDIO Output
______
AUDIO
Output Conditions
L
PCM audio data (CS bit 1 = "L")
H
Non-audio data (CS bit 1 = "H")
10.6 Emphasis Information Output (EMPHA)
MOUT can output whether there is 50/15μs emphasis parameter for consumer by switching the contents of MOUT
output by MOSEL.
MOUT is immediately output upon detection of RERR even during "H" output.
Table 10.8 MOUT Output
MOUT
Output Conditions
L
No pre-emphasis
H
50/15
μs pre-emphasis
10.7 IEC61937, DTS-CD/LD Detection Flag Output
A function to output IEC61937 and DTS-CD/LD detection flag for non-PCM data is provided.
DTS-CD/LD is compatible with "14-bit format."
When bit 1 of channel status is non-PCM data, the IEC61937 sync signal is detected and detection flag is output. If bit
1 is PCM data, detection flag is not output.
The DTS-CD/LD sync signal detection is done based on the sync pattern and the base frequency. The sync pattern is
checked every 4096th frame, and the detection status is held until the sync pattern is no longer verified.
The IEC61937 and DTS-CD/LD detection flags can be readout with the microcontroller interface in addition to output
to the
____________
AUDIO pin by AOSEL. When the UNPCM non-PCM signal output setting is selected through the INT output
contents setting, an interrupt signal is output from INT detecting an IEC61937 or DTS-CD/LD sync signal. Reading
output register from this information can see details of Non-PCM signal. This information is used to read out the
output register and identify the details of the non-PCM signal
The detection flags are cleared when fs is changed or when a PLL lock error or data error occurs.
RLRCK
Lock Signal
RERR
RDATA
OK
3ms to 144ms
Data
Output start from RWCK edge immediately after RERR is lowered
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