參數(shù)資料
型號(hào)： LC72146V
元件分類： PLL合成/DDS/VCOs
英文描述： PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24
封裝： SSOP-24
文件頁(yè)數(shù)： 13/22頁(yè)
文件大?。?/td> 157K
代理商： LC72146V
Application System Example
Note on Clock Time Base Usage
A resistor of at least 100 k
must be used as the clock time base output pin (O-7) pull-up resistor. Also, the use of a
Schmitt circuit is recommended in the controller (microprocessor) input circuit to prevent chattering. Forming a loop
filter with the built-in low-pass filter transistor will also serve to prevent degradation of the VCO C/N characteristics.
Since the grounding points for the clock time base output pin and the low-pass filter transistor are a common point
within the IC, current fluctuations in the clock time base output pin must be kept to a minimum to limit influencing the
low-pass filter.
No. 4922-20/22
LC72146, 72146M, 72146V
XOUT
CE
DI
CL
DO
O–7
O–6
I/O–5
I/O–4
I/O–3
I/O–2
I/O–1
CE
DI
CL
DO
(TB)
XIN
VSS
AOUT
AIN
PD0
PD1
VSS
FMIN
AMIN
VDD
HCTR/I–6
HCTR/I–7
SO
end-UC
Unlock
ST/MON
SD
SI
FMVCC
AMVCC
IF
ST/MON
SD
STRQ
IF
ST/MON
SD
STRQ
FM
VCC
AM
VCC
FMVCO
AMVCO
– com
L
C
7
2
1
4
6
,
7
2
1
4
6
M
,
7
2
1
4
6
V
Time base output
Schmitt input
Microprocessor
Loop filter
VDO
VCC
Vt
LC72146
Rt
≥ 100k
S
相關(guān)PDF資料
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