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No. 5488-6/27
LC66E5316
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Pin
I/O
Overview
Output driver type
Options
State after a Standby mode
reset
operation
P30/INT1/A4
P31/POUT0/
A5
P32/POUT1/
A6
P33/HOLD
P40/INV0I/
A7
P41/INV0O/
A8
P42/INV1I/
A9
P43/INV1O/
A10
P50/A11
P51/A12
P52/A13
P53/INT2/TA
P60/SI1
P61/SO1
P62/SCK1
P63/PIN1
I/O ports P30 to P32
Input or output in 3-bit or 1-bit units
P30 is also used as the INT1 interrupt
request.
P31 is also used for the square wave
output from timer 0.
P32 is also used for the square wave
and PWM output from timer 1.
P31 and P32 also support 3-state
outputs.
Used as address pins in EPROM mode
Hold mode control input
Hold mode is set up by the HOLD
instruction when HOLD is low.
In hold mode, the CPU is restarted by
setting HOLD to the high level.
This pin can be used as input port P33
along with P30 to P32.
When the P33/HOLD pin is at the low
level, the CPU will not be reset by a
low level on the RES pin. Therefore,
applications must not set P33/HOLD
low when power is first applied.
I/O ports P40 to P43
Input or output in 4-bit or 1-bit units
Input or output in 8-bit units when used
in conjunction with P50 to P53.
Can be used for output of 8-bit ROM
data when used in conjunction with
P50 to P53.
Dedicated inverter circuit (option)
Used as address pins in EPROM mode
I/O ports P50 to P53
Input or output in 4-bit or 1-bit units
Input or output in 8-bit units when used
in conjunction with P40 to P43.
Can be used for output of 8-bit ROM
data when used in conjunction with
P40 to P43.
P53 is also used as the INT2 interrupt
request.
Used as address pins in EPROM mode
I/O ports P60 to P63
Input or output in 4-bit or 1-bit units
P60 is also used as the serial input SI1
pin.
P61 is also used as the serial output
SO1 pin.
P62 is also used as the serial clock
SCK1 pin.
P63 is also used for the event count
input to timer 1.
I/O
I
I/O
I/O
I/O
Pch: CMOS type
Nch: Intermediate sink current
type
Pch: Pull-up MOS type
CMOS type when the inverter
circuit option is selected
Nch: Intermediate sink current
type
Pch: Pull-up MOS type
Nch: Intermediate sink current
type
Pch: CMOS type
Nch: Intermediate sink current
type
CMOS or Nch OD
output
Pull-up MOS or
Nch OD output
Output level on
reset
Inverter circuit
Pull-up MOS or
Nch OD output
Output level on
reset
CMOS or Nch OD
output
H
High or
low
(option)
Inverter
I/O is set
to the
output off
state.
High or low
(option)
H
Hold mode:
Output off
Hold mode:
Port output
off, inverter
output off
Hold mode:
Output off
Halt mode:
Output
retained
Hold mode:
Output off
Halt mode:
Output
retained
Halt mode:
Port output
retained,
inverter
output
continues
Halt mode:
Output
retained