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Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Note: 1. Applies to open drain output specification pins. The rating from the “other pin” entry applies for specifications other than the open drain output
specification.
2. Levels up to the free-running oscillation level are allowed for the oscillator input and output pins.
3. Inflow current (For P8, the CMOS output specifications apply.)
4. Outflow current (Applies to pull-up output specification and CMOS output specification pins except P8.)
5. We recommend using reflow soldering methods to mount the QFP package version.
Contact your Sanyo sales representative to discuss process conditions if techniques in which the whole package is immersed in a solder bath
(solder dip or spray techniques) are used.
Allowable Operating Ranges
at Ta = –30 to + 70°C, V
SS
= 0 V, V
DD
= 3.0 to 5.5 V unless specified otherwise
Note: 1. Applies to open drain specification pins. However, the rating for V
IH
(2) applies to the P33/HOLD pin. Ports P2, P3 and P6 cannot be used as input
pins when CMOS output specifications are used.
2. Applies to open drain specification pins. P9, which has CMOS output specifications, can be used as input pins.
3. When PE is used as a three-value input, V
IH
(4), V
IM
and V
IL
(4) apply. Port PC cannot be used as input pins when CMOS output specifications
are used.
No. 5003-8/22
LC66556B, 66558B
Parameter
Symbol
Conditions
Ratings
Unit
Note
Maximum supply voltage
V
DD
max
V
IN
(1)
V
IN
(2)
V
DD
P2, P3 (except for the P33/HOLD pin) and P6
–0.3 to +7.0
V
Input voltage
–0.3 to +15.0
V
1
Other inputs
–0.3 to V
DD
+ 0.3
V
2
V
OUT
(1)
P2, P3 (except for the P33/HOLD pin),
P6, P7 and PA
–0.3 to +15.0
V
1
Output voltage
V
OUT
(2)
Other outputs
–0.3 to V
DD
+ 0.3
V
2
I
ON
(1)
P0, P1, P2, P3 (except for the P33/HOLD pin),
P4, P5, P6, P8, P9 and PC
4
mA
3
Output current per pin
I
ON
(2)
–I
OP
(1)
P7, PA, PB
20
mA
3
P0, P1, P4, P5, P7, PA, PB
2
mA
4
–I
OP
(2)
P2, P3 (except for the P33/HOLD pin),
P6, P8, P9 and PC
4
mA
4
Σ
I
ON
(1)
P2, P3 (except for the P33/HOLD pin),
P4, P5, P6, P7 and P8
75
mA
3
Total pin current
Σ
I
ON
(2)
P0, P1, P9, PA, PB, PC
75
mA
3
–
Σ
I
OP
(1)
P2, P3 (except for the P33/HOLD pin),
P4, P5, P6, P7 and P8
25
mA
4
–
Σ
I
OP
(2)
Pd max
P0, P1, P9, PA, PB, PC
25
mA
4
Allowable power dissipation
Ta = –30 to +70°C: DIP64S (QIP64E)
600 (430)
mW
5
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Parameter
Symbol
Conditions
min
typ
max
Unit
Note
Operating supply voltage
V
DD
V
DD
(H)
V
DD
V
DD
: In hold mode
P2, P3 (except for the P33/HOLD pin), P6:
With the output n-channel transistor off
3.0
5.5
V
Memory retention supply voltage
1.8
5.5
V
V
IH
(1)
0.8 V
DD
13.5
V
1
V
IH
(2)
P33/HOLD, P9, RES, OSC1:
With the output n-channel transistor off
0.8 V
DD
V
DD
V
2
Input high level Voltage
V
IH
(3)
P0, P1, P4, P5, PC, PD, PE:
With the output n-channel transistor off
0.75
V
DD
V
DD
V
3
V
IH
(4)
V
IM
V
CMM
(1)
PE: When three-state input is used
0.8 V
DD
0.4 V
DD
V
DD
V
Intermediate level input voltage
PE: When three-state input is used
0.6 V
DD
V
DD
V
DD
–
V
PD0, PC2: When comparator input is used
1.5
V
Common-mode input voltage range
V
CMM
(2)
PD1, PD2, PD3, PC3: When comparator
input is used
V
SS
V
1.5
V
IL
(1)
P2, P3 (except for the P33/HOLD pin), P6, P9, RES,
OSC1:N-channel output, transistor off
V
SS
0.2 V
DD
V
2
V
IL
(2)
P33/HOLD: V
DD
= 1.8 to 5.5 V
P0, P1, P4, P5, PC, PD, PE, TEST: N-channel output,
transistor off
V
SS
0.2 V
DD
0.25
V
DD
0.2 V
DD
4.35
(0.92)
V
Low level input voltage
V
IL
(3)
V
SS
V
3
V
IL
(4)
PE: When three-state input is used
V
SS
V
Operating frequency
(instruction cycle time)
fop (T
CYC
)
0.4 (10)
MHz
(μs)
Continued on next page.