參數(shù)資料
型號: LC66556B
廠商: Sanyo Electric Co.,Ltd.
英文描述: Four-Bit Single-Chip Microcontrollers with 6 k Bytes of On-Chip ROM(4位單片微控制器(帶片上6K字節(jié)ROM))
中文描述: 四位單芯片6月K字節(jié)的片上ROM微控制器(4位單片微控制器(帶片上6k的字節(jié)光盤))
文件頁數(shù): 10/22頁
文件大?。?/td> 283K
代理商: LC66556B
Continued from preceding page.
Note: 8. Reset state
Figure 1 External Clock Input Waveform
Figure 2 Ceramic Oscillator Circuit
Figure 3 Oscillator Stabilization Period
No. 5003-10/22
LC66556B, 66558B
Parameter
Symbol
Conditions
min
typ
max
Unit
Note
[Serial clock]
Cycle time
Input
t
CKCY
0.9
μs
Output
2.0
T
CYC
μs
Low level/high
level pulse widths
Output
Input
t
CKL
t
CKH
SCK0, SCK1: With the timing from Figure 4 and
the test load from Figure 5
0.4
1.0
T
CYC
μs
Rise/fall times
Output
t
CKR
, t
CKF
0.1
[Serial input]
Data setup time
t
ICK
S10, SI1, SI0, SI1: With the timing in Figure 4.
Stipulated with respect to the rising edge
for SCK0 and SCK1.
0.3
μs
Data hold time
t
CKI
0.3
μs
[Serial output]
SO0, SO1: With the timing from Figure 5 and
the test load from Figure 5. Stipulated with respect to
the falling edge for SCK0 and SCK1.
Output delay time
t
CKO
0.3
μs
[Pulse input conditions]
INT0, See Figure 6:
Conditions such that the INT0 interrupt is accepted
Conditions such that timer 0 event counter and pulse
width measurement inputs are accepted
INT0
High and low level pulse widths
t
I0H,
t
I0L
2
T
CYC
High and low level pulse widths for
interrupt inputs other than INT0
t
I1H,
t
I1L
INT1, INT2, INT3, INT4, INT5, See Figure 6:
Conditions such that all interrupts are accepted
2
T
CYC
PIN1
High and low level pulse widths
t
PINH,
t
PINL
PIN1, See Figure 6: Conditions such that timer 1
event counter inputs are accepted
2
T
CYC
RES
High and low level pulse widths
t
RSH
, t
RSL
RES, See Figure 6: Conditions such that reset
can occur
3
T
CYC
Comparator response speed
T
RS
PD, See Figure 7
20
ms
Operating mode current drain
I
DD
op
V
DD
: 4 MHz ceramic oscillator
V
DD
: 4 MHz external clock
V
DD
: 4 MHz ceramic oscillator
V
DD
: 4 MHz external clock
V
DD
: V
DD
= 1.8 to 5.5 V
3.0
5.0
mA
8
3.0
5.0
mA
HALT mode current drain
I
DDHALT
1.0
2.0
mA
1.0
2.0
mA
Hold mode current drain
I
DDHOLD
0.01
10
μA
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