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參數(shù)資料
| 型號： | LC662308A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM |
| 中文描述： | 四位單片機與16 KB的片上微控制器檢察官辦公室胎膜早破 |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 205K |
| 代理商： | LC662308A |
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Continued from preceding page.
Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to V
DD
.
CMOS output: Complementary output.
OD output: Open-drain output.
No. 5489-7/28
LC66P5316
Pin
I/O
Overview
Output driver type
Options
State after a Standby mode
reset
operation
P50/A11
P51/A12
P52/A13
P53/INT2/TA
P60/SI1
P61/SO1
P62/SCK1
P63/PIN1
P80/DS0
P81/DS1
P82
P83
PC0
PC1
PC2/INV2I/
CE
PC3/INV2O/
DASEC
PD0/AN1/
INV3I
PD1/AN2/
INV3O
PD2/AN3/
INV4I
PD3/AN4/
INV4O
PE0/XT1
PE1/XT2
OSC1
OSC2
RES/V
PP
/
OE
TEST/
EPMOD
V
DD
V
SS
I/O ports P50 to P53
Input or output in 4-bit or 1-bit units
Input or output in 8-bit units when used
in conjunction with P40 to P43.
Can be used for output of 8-bit ROM
data when used in conjunction with
P40 to P43.
P53 is also used as the INT2 interrupt
request.
Used as address pins in EPROM mode
I/O ports P60 to P63
Input or output in 4-bit or 1-bit units
P60 is also used as the serial input SI1
pin.
P61 is also used as the serial output
SO1 pin.
P62 is also used as the serial clock
SCK1 pin.
P63 is also used for the event count
input to timer 1.
Dedicated output ports P80 to P83
Output in 4-bit or 1-bit units
The contents of the output latch are
input using input instructions.
P80 is a data shaper input (options)
P81 is a data shaper output (options)
I/O ports PC0 to PC3
Output in 4-bit or 1-bit units
Dedicated inverter circuits (option)
Used as the control CE and DASEC
pin in EPROM mode.
Dedicated input ports PD0 to PD3
Can be switched in software to function
as 16-value analog inputs.
Dedicated inverter circuits (option)
Dedicated input ports and sub-oscillator
connections
System clock oscillator connections
When an external clock is used, leave
OSC2 open and connect the clock signal
to OSC1.
System reset input
When the P33/HOLD pin is at the high
level, a low level input to the RES pin
will initialize the CPU.
Used as the V
PP
/OE pin in EPROM
mode.
CPU test pin
This pin must be connected to V
SS
during normal operation.
Power supply pins
I/O
I/O
O
I/O
I
I
I
O
I
I
Pch: Pull-up MOS type
Nch: Intermediate sink current
type
Pch: CMOS type
Nch: Intermediate sink current
type
Pch: CMOS type
Nch: Intermediate sink current
type
Pch: CMOS type
Nch: Intermediate sink current
type
Only when the inverter circuit
option is selected:
Pch: CMOS type
Nch: Intermediate sink current
type
Pull-up MOS or
Nch OD output
Output level on
reset
CMOS or Nch OD
output
CMOS or Nch OD
output
Output level at
reset
Data shaper
circuit
CMOS or Nch OD
output
Inverter circuits
Inverter circuits
Sub-oscillator/port
PE selection
Ceramic oscillator
or external clock
selection
High or low
(option)
H
High or low
(option)
H
Normal
input
Option
selection
Option
selection
Hold mode:
Output off
Hold mode:
Output off
Hold mode:
Output off
Hold mode:
Output off
Inverter
Hold mode:
Output off
Halt mode:
Output
continues
Hold mode:
Oscillator stops
Halt mode:
Output
retained
Halt mode:
Output
retained
Halt mode:
Output
retained
Halt mode:
Output
retained
Halt mode:
Oscillator
continues
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