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參數(shù)資料
| 型號： | LC662308A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM |
| 中文描述： | 四位單片機與16 KB的片上微控制器檢察官辦公室胎膜早破 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大小： | 205K |
| 代理商： | LC662308A |
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Continued from preceding page.
No. 5489-22/28
LC66P5316
Continued on next page.
Instruction code
Affected
status
bits
Mnemonic
Operation
Description
Note
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
[Arithmetic, logic and comparison instructions]
Exclusive or M with
AC then store AC
AC
←
(AC)
[M (HL)]
Take the logical exclusive or
of AC and M (HL) and store
the result in AC.
EXL
0 0 0 1
0 1 0 1
1
1
ZF
And M with AC then
store M
M (HL)
←
(AC)
[M (HL)]
Take the logical and of AC
and M (HL) and store the
result in M (HL).
ANDM
0 0 0 0
0 0 1 1
1
1
ZF
Or M with AC then
store M
M (HL)
←
(AC)
[M (HL)]
Take the logical or of AC and
M (HL) and store the result
in M (HL).
ORM
0 0 0 0
0 1 0 0
1
1
ZF
Compare the contents of AC
and M (HL) and set or clear CF
and ZF according to the result.
CM
Compare AC with M
0 0 0 1
0 1 1 0
1
1
[M (HL)] + (AC) + 1
ZF, CF
Compare the contents of AC
and the immediate data
I
3
I
2
I
1
I
0
and set or clear CF
and ZF according to the result.
CI i4
Compare AC with
immediate data
1 1 0 0
1 0 1 0
1 1 1 1
I
3
I
2
I
1
I
0
2
2
I
3
I
2
I
1
I
0
+ (AC) + 1
ZF, CF
ZF
←
1
if (DP
L
) = I
3
I
2
I
1
I
0
ZF
←
0
if (DP
L
) I
3
I
2
I
1
I
0
ZF
←
1
if (AC, t2) = [M (HL), Compare the corresponding
t2]
bits specified by t0 and t1 in
ZF
←
0
AC and M (HL). Set ZF if
if (AC, t2) [M (HL),
identical and clear ZF if not.
t2]
Compare the contents of DP
L
with the immediate data.
Set ZF if identical and clear
ZF if not.
CLI i4
Compare DP
L
with
immediate data
1 1 0 0
1 0 1 1
1 1 1 1
I
3
I
2
I
1
I
0
2
2
ZF
CMB t2
Compare AC bit with
M data bit
1 1 0 0
1 1 0 1
1 1 1 1
0 0 t
1
t
0
2
2
ZF
[Load and store instructions]
LAE
Load AC and E from
M2 (HL)
0 1 0 1
1 1 0 0
1
1
AC
←
M (HL),
E
←
M (HL + 1)
Load the contents of M2 (HL)
into AC, E.
LAI i4
Load AC with
immediate data
1 0 0 0
I
3
I
2
I
1
I
0
1
1
AC
←
I
3
I
2
I
1
I
0
Load the immediate data
into AC.
ZF
Has a vertical
skip function
LADR i8
Load AC from M
direct
1 1 0 0
I
7
I
6
I
5
I
4
0 0 0 1
I
3
I
2
I
1
I
0
2
2
AC
←
[M (i8)]
Load the contents of M (i8)
into AC.
ZF
S
Store AC to M
0 1 0 0
0 1 1 1
1
1
M (HL)
←
(AC)
Store the contents of AC into
M (HL).
SAE
Store AC and E to
M2 (HL)
0 1 0 1
1 1 1 0
1
1
M (HL)
←
(AC)
M (HL + 1)
←
(E)
Store the contents of AC, E
into M2 (HL).
Load the contents of M (reg)
into AC.
The reg is either HL or XY
depending on t
0
.
Load AC from
M (reg)
LA reg
0 1 0 0
1 0 t
0
0
1
1
AC
←
[M (reg)]
ZF
N
b
N
c
Magnitude
comparison
CF ZF
[M (HL)] > (AC)
[M (HL)] = (AC)
[M (HL)] < (AC)
0
1
1
0
1
0
Magnitude
comparison
CF ZF
I
3
I
2
I
1
I
0
> AC
I
3
I
2
I
1
I
0
= AC
I
3
I
2
I
1
I
0
< AC
0
1
1
0
1
0
reg
T
0
0
1
HL
XY
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