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參數(shù)資料
| 型號： | LC6529F |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 4-Bit Microcomputer for Small-Scale Control Applications |
| 中文描述： | 4小位微機控制應用規(guī)模 |
| 文件頁數(shù)： | 35/39頁 |
| 文件大?。?/td> | 525K |
| 代理商： | LC6529F |
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— Main circuit states
a: Power-on reset sequence
Once the power supply voltage has reached the proper level, the chip automatically resets and begins
execution with the program counter set to 000
H
.
Caution: This circuit does not reset the chip until the power supply voltage is within the range specified for
V
DD
, so leaves the chip in an indeterminate state.
b: Momentary break in main power supply
i.
If only the RES pin and none of the Pxx pins drops below the threshold level V
IL
, the chip resets and
repeats the power-on reset sequence.
ii.
If the RES pin and the Pxx pins remain above the threshold level V
IL
, the chip continues normal
execution.
iii. If both the RES pin and the Pxx pins drop below the threshold level V
IL
, the chip resets if two
consecutive polls fail to detect a low at Pxx or, if a low is found, enters the HALT mode and then,
because the power has been restored, leaves the HALT mode.
c: Recovery from power outage backup state
Since the power has been restored, the chip leaves the HALT mode.
— Design considerations
a: V
+
rise time and C2
The V
+
rise time must be approximately ten times the RC constant for the reset circuit, C2
×
R, where R is
the internal resistance (typ. 200 k
). It must also be no longer than approximately 20 ms.
b: R1 and C1 values
R1 must be as small as possible; C1, as large as possible to provide the longest backup time. At the same
time, however, R1 must be large enough such that the C1 charging current does not exceed the power
supply capacity.
c: R2 and R3 values
Choose these to make the Pxx high levels equal to V
DD
.
d: R4 value
Select R4 and thus the RC constant for C2 and R4 so that C2 discharges sometime in the interval between
the point at which V
+
falls below V
+TRON
(turning off the transistor) and the point at which Pxx falls below
V
IL
. (Otherwise, the chip will enter the HALT mode and then not respond to a reset.)
e: R5 and R6 values
Select R5 and R6 so that V
+
when the reset circuit operates, switching on the transistor (that is, when R5
and R6 produce a V
BE
of approximately 0.6 V) is at least the minimum operating voltage (V
DD
) plus the
V
F
for diode D1. To provide a rapid reset once the power is restored, however, keep this voltage as small as
possible while still satisfying these conditions.
f:
Calculating backup time
From the time that the chip detects the power outage at Pxx until it executes the HALT instruction, the chip
operates normally so drains relatively large amounts of current. C1 must therefore be large enough to
provide backup power not only for the set's backup period, but for this transitional period as well.
— Software considerations
a: Assign signals so that PA3 is maintained high during standby operation.
b: The software should double-check a standby request by polling twice.
Example:
BP1
BP1
HALT
AAA
AAA
: Poll once
: Poll twice
: Begin standby operation
AAA :
No. 5117-35/39
LC6529N, LC6529F, LC6529L
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