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參數(shù)資料
| 型號： | LA76850 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Monolithic Linear IC Black & White Television IC |
| 中文描述： | 單片線性集成電路黑色 |
| 文件頁數(shù)： | 16/31頁 |
| 文件大?。?/td> | 295K |
| 代理商： | LA76850 |
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LA76850
NoA0017-16/31
Deflection Block Input Signals
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks: No signal
2. C input: No. signal
3. Sync input: A horizontal/vertical composite sync signal
PAL:
43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz)
NTSC:
40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz)
Note: No burst signal, chroma signal shall exist below the pedestal level.
4. Bus control conditions: Initial conditions unless otherwise specified.
5. The delay time from the rise of the horizontal output (pin 22 output) to the fall of the FBP IN (pin 23 input) is 9
μ
s.
6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V).
Burst signal
Chroma signal
Signal unsuitable
for Y input
Signal suitable
for Y input
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