參數(shù)資料
型號: L99H01XPTR
廠商: STMICROELECTRONICS
元件分類: 運(yùn)動控制電子
英文描述: BRUSH DC MOTOR CONTROLLER, PDSO36
封裝: ROHS COMPLIANT, SSOP-36
文件頁數(shù): 2/53頁
文件大?。?/td> 1129K
代理商: L99H01XPTR
Block diagram and pin description
L99H01
Doc ID 15567 Rev 3
9
EN
Enable input. The enable input has a pull-down resistor.
10
DIR
Direction select input for H-bridge control. This input has a pull-down
current.
11
PWM
PWM input for H-bridge control. This input has a pull-down current.
12
CSN
Chip select not input: this input is low active and requires CMOS logic
levels. The serial data transfer between L99H01 and microcontroller is
enabled by pulling the input CSN to low-level. This input has a pull-up
current.
13
CLK
Serial clock input: this input controls the internal shift register of the
SPI and requires CMOS logic levels.This input has a pull-down
current.
14
DI
Serial data in: the input requires CMOS logic levels and receives serial
data from the microcontroller. The data is an 8-bit control word and the
most significant bit (MSB, bit 7) is transferred first. This input has a
pull-down current.
15
DO
Serial data out: the diagnosis data is available via the SPI and this
tristate-output. The output remains in tristate, if the chip is not selected
by the input CSN (CSN = high).
16
CSO
Current sense amplifier output: VCC compatible.
17
CSI1+
Current sense amplifier input: positive input 1, multiplexible.
18
CSI1-
Current sense amplifier input: negative input 1, multiplexible.
19
CSI2+
Current sense amplifier input: positive input 2, multiplexible.
20
CSI2-
Current sense amplifier input: negative input 2, multiplexible.
21
NC
Not connected.
22
TS/ ACT_OFF Thermal sensor interface or external off for all gate drivers.
23
GL2
Gate driver for PowerMOS low-side switch in halfbridge 2.
24
SL2
Source of low-side switch in halfbridge 2.
25
GH2
Gate driver for PowerMOS high-side switch in halfbridge 2.
26
SH2
Source/drain of halfbridge 2.
27
SL1
Source of low-side switch in halfbridge 1.
28
GL1
Gate driver for PowerMOS low-side switch in halfbridge 1.
29
SH1
Source/drain of halfbridge 1.
30
GH1
Gate driver for PowerMOS high-side switch in halfbridge 1.
31
CP
Charge pump output.
32
CP2+
Charge pump pin for capacitor 2, positive side.
Table 3.
Pin definitions and functions (continued)
Pin
Symbol
Function
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