
L9952GXP
SPI control and status registers
Doc ID 13518 Rev 5
8.1.4
Status register 0
The contents of the status register 0 can be read implicitly, while accessing the control
register 0 or control register 2.
Table 53.
Status register 0
Wakeup Inputs
Over current
Open load
Bit
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Access
r
rr
r
rr
r
Reset
0
00
0
000
0
Name
RES
Cold
Start
LIN
INH
WU
4
WU
3
WU
2
WU
1
SHT5V2
REL
2OC
REL
1OC
HS
OC
HS
4OC
HS
3OC
HS
2OC
HS
10C
HS
O L
HS
4OL
HS
3OL
HS
2OL
HS
1OL
Table 54.
Configuration bit HSx_OL, HSx_OC and Relx_OC
Name/state
Definition/function
HS1..4_OL
Open load status from the High Side Driver OUT1..4.
0
No open load has been detected.
1
Open load has been detected.
HS_OL
Open load status from the High Side Driver OUT_HS
0
No open load has been detected.
1
Open load has been detected.
HS1..4_OC
Over current status from the High Side Driver OUT1..4.
0
No over current has been detected.
1
Over current has been detected.
HS_OC
Over current status from the High Side Driver OUT_HS.
0
No over current has been detected.
1
Over current has been detected.
Rel 1,2_OC
Over current status from Relais1,2
0
No over current has been detected.
1
Over current has been detected.
Table 55.
Configuration bit SHT5V2, WUx, INH, LIN and Cold Start
Name/state
Definition/function
SHT5V2
V2 short to ground at turn on; condition: V2 < 2V for more than 4ms. “1” = fail
WU4...WU1
Status of the corresponding Inputs WU1..4 (according to filter settings in CR2)