參數(shù)資料
型號： L9952GXPTR
廠商： STMICROELECTRONICS
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO36
封裝： LEAD FREE, SSO-36
文件頁數(shù)： 50/68頁
文件大?。?/td> 859K
代理商： L9952GXPTR
SPI control and status registers
L9952GXP
Doc ID 13518 Rev 5
8
SPI control and status registers
8.1
SPI registers
24bit shift register: first 2 bits are address (A1,A0) and 22 bits are data.
During power-on reset, all registers are set to zero.
Note:
During the shift in of the address bits, (2 clock periods) an internal error bit (Err) is fed to the
DO output.
D23,D22 -> error flags (seen from DO)
The error flag is generated by logic OR combination of following error bits:
VCC_Fail1,2; TSD1,2; TW; OV,UW; OC_HS1..4; OC_OUTHS; OC_REL1..2; OC_V2
Table 35.
SPI registers
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
A1
A0
Data
Address
[write]
On5V2
On Signals
Control
Register 0
GO
VCC
GO
VBAT
TRIG
ON
V21
ON
V20
REL
2
REL
1
OUT
HS2
OUT
HS1
OUT
HS0
HS
42
HS
41
HS
40
HS
32
HS
31
HS
30
HS
22
HS
21
HS
20
HS
12
HS
11
HS
10
00
Address
[write]
Timer
2
Timer
1
Loop
Pullup / down
Wakeup Sources OL
Wakeup Sources
Control
Register 1
CLR
INT_en
T20
T13
T12
T11
T10
L2
L1
L0
U3
U2
U1
U0
W7
W6
W5
W4
W3
W2
W1
W0
01
Address
[write]
Input config
Reset level
LIN
Openload treshold
Control
Register 2
RES
ICMP
LS
OVUV
LIN
Slope
IC
41
IC
40
IC
31
IC
30
IC
21
IC
20
IC
11
IC
10
LEV
1
LEV
0
TXT
TOUT
LINPU
O_HS
REC
VLOCK
OUT
OLT
HS4
OLT
HS3
OLT
HS2
OLT
HS1
10
Address
[read]
Reserved
Wakeup
Wakeup input status
Overcurrent
Openload
Status
Register 0
RES
COLD
START
L I N
I NH
WU4
WU3
WU2
WU1
SHT5
V2
Rel2
OC
Rel1
OC
HS
OC
HS4
OC
HS3
OC
HS2
OC
HS1
OC
HS
OL
HS4
OL
HS3
OL
HS2
OL
HS1
OL
Err
Address
Reserved
LIN State
Watchdog Reset
5V Restarts
State
Status
Register 1
RES
DOM
TXD
SHT
BAT
SHT
GND
TRIG
WD
3
WD
2
WD
1
WD
0
R2
R1
R0
ST1
ST0
VCC2
Fail
VCC1
Fail
TSD
2
TSD
1
TW
UV
OV
Err
Address
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